PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 306

IC MCU FLASH 8KX16 28-DIP

PIC18LF2431-I/SP

Manufacturer Part Number
PIC18LF2431-I/SP
Description
IC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2431-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
PIC18F2331/2431/4331/4431
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39616D-page 306
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
=
=
Inclusive OR Literal with W
[ label ]
0  k  255
(W) .OR. k  W
N, Z
The contents of W are ORed with the
8-bit literal, ‘k’. The result is placed in
W.
1
1
literal ‘k’
IORLW
Read
0000
Q2
0x9A
0xBF
IORLW k
1001
0x35
Process
Data
Q3
kkkk
Write to
Q4
W
kkkk
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
RESULT =
W
RESULT =
W
Q1
=
=
register ‘f’
Inclusive OR W with f
[ label ]
0  f  255
d  [0,1]
a  [0,1]
(W) .OR. (f)  dest
N, Z
Inclusive OR W with register, ‘f’. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is ‘1’,
the result is placed back in register, ‘f’. If
‘a’ is ‘0’, the Access Bank will be
selected, overriding the BSR value. If
‘a’ = 1, then the bank will be selected as
per the BSR value.
1
1
IORWF
Read
0001
Q2
0x13
0x91
0x13
0x93
 2010 Microchip Technology Inc.
RESULT, W
IORWF
00da
Process
Data
Q3
f [,d [,a]]
ffff
destination
Write to
Q4
ffff

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