PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 53

• Manufacturer Part Number: PIC18LF2431-I/SP
• Description: IC MCU FLASH 8KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2431-I/SP

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 24
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

FIGURE 5-7:
TABLE 5-2:
 2010 Microchip Technology Inc.
Power-on Reset
RESET Instruction
Brown-out
MCLR Reset during power-managed
Run modes
MCLR Reset during power-managed Idle
and Sleep modes
WDT Time-out during full power or
power-managed Run modes
MCLR Reset during full-power execution
Stack Full Reset (STVREN = 1)
Stack Underflow Reset (STVREN = 1)
Stack Underflow Error (not an actual
Reset, STVREN = 0)
WDT time-out during power-managed Idle
or Sleep modes
Interrupt exit from power-managed modes
Legend:
Note 1:
Note:
INTERNAL RESET
PWRT TIME-OUT
INTERNAL POR
OST TIME-OUT
PLL TIME-OUT
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’.
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).
T
T
OST
PLL
MCLR
Condition
 2 ms max. First three stages of the PWRT timer.
V
= 1024 clock cycles.
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
DD
TIME-OUT SEQUENCE ON POR w/PLL ENABLED (MCLR TIED TO V
Program
PC + 2
Counter
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
PIC18F2331/2431/4331/4431
(1)
T
PWRT
0--1 1100
0--0 uuuu
0--1 11u-
0--u 1uuu
0--u 10uu
0--u 0uuu
0--u uuuu
u--u uuuu
u--u 00uu
u--u u0uu
Register
RCON
T
OST
RI
1
0
1
u
u
u
u
u
u
u
TO
1
u
1
1
1
0
u
u
0
u
T
PLL
PD
1
u
1
u
0
u
u
u
0
0
POR
0
u
u
u
u
u
u
u
u
u
BOR STKFUL STKUNF
0
u
0
u
u
u
u
u
u
u
DS39616D-page 53
DD
0
u
u
u
u
u
u
1
u
u
u
u
)
0
u
u
u
u
u
u
u
1
1
u
u