PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 217

• Manufacturer Part Number: PIC18LF2431-I/SP
• Description: IC MCU FLASH 8KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2431-I/SP

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 24
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 5 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

20.0
The Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) module is one of the
two serial I/O modules available in the PIC18F2331/
2431/4331/4431 family of microcontrollers. EUSART is
also known as a Serial Communications Interface or
SCI.
The EUSART can be configured as a full-duplex
asynchronous system that can communicate with
peripheral devices, such as CRT terminals and
personal computers. It can also be configured as a half-
duplex synchronous system that can communicate
with peripheral devices, such as A/D or D/A integrated
circuits, serial EEPROMs, etc.
The EUSART module implements additional features,
including
calibration, automatic wake-up on Sync Break
reception and 12-bit Break character transmit. These
features make it ideally suited for use in Local
Interconnect Network (LIN/J2602) bus systems.
The EUSART can be configured in the following
modes:
• Asynchronous (full-duplex) with:
• Synchronous – Master (half-duplex) with
• Synchronous – Slave (half-duplex) with selectable
In order to configure pins, TX and RX, as the Enhanced
Universal
Transmitter:
• SPEN (RCSTA<7>) bit must be set ( = 1),
• TRISC<6> bit must be set ( = 1), and
• TRISC<7> bit must be set ( = 1).
 2010 Microchip Technology Inc.
- Auto-wake-up on character reception
- Auto-baud calibration
- 12-bit Break character transmission
selectable clock polarity
clock polarity
Note:
ENHANCED UNIVERSAL
SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (EUSART)
automatic
The EUSART control will automatically
reconfigure the pin from input to output as
needed.
Synchronous
baud
Asynchronous
rate
detection
PIC18F2331/2431/4331/4431
Receiver
and
The operation of the Enhanced USART module is
controlled through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These are detailed on the following pages in
Register
respectively.
20.1
The EUSART may operate in Asynchronous mode
while the peripheral clocks are being provided by the
internal oscillator block. This makes it possible to
remove the crystal or resonator that is commonly con-
nected as the primary clock on the OSC1 and OSC2
pins.
The factory calibrates the internal oscillator block out-
put (INTOSC) for 8 MHz (see
this frequency may drift as V
changes, and this directly affects the asynchronous
baud rate. Two methods may be used to adjust the
baud rate clock, but both require a reference clock
source of some kind.
The first (preferred) method uses the OSCTUNE
register to adjust the INTOSC output back to 8 MHz.
Adjusting the value in the OSCTUNE register allows for
fine resolution changes to the system clock source (see
Section 3.6.4 “INTOSC Frequency Drift”
information).
The other method adjusts the value in the Baud Rate
Generator (BRG). There may not be fine enough
resolution when adjusting the Baud Rate Generator to
compensate for a gradual change in the peripheral
clock frequency.
20-1,
Asynchronous Operation in
Power-Managed Modes
Register 20-2
Table
and
DD
DS39616D-page 217
26-6). However,
or temperature
Register
for more
20-3,