EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 299

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-IQZ

Manufacturer Part Number
EP9302-IQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-IQZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
LQFP
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1253

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9302-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9302-IQZ
Manufacturer:
CIRRUS
Quantity:
20 000
BACKGROUND
DS785UM1
31
15
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
29
13
28
12
MASK:
0x8004_0030 - Read/Write
0x0000_0000
0x00FF_FFFF
RSVD:
BG:
Block Function Background Register
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Mask - Read/Write
For a Block Copy function, the value in this field specifies
the logical mask, if used. If BG = ‘1’, M = ‘00’, and REMAP
= ‘1’ in the
destination foreground color for source image pixels = ‘1’.
For Block Fill and Line Draw functions, the value in this
field specifies the pixel color for the destination image.
The mask or color value is located in the least significant
BPP part of the register for modes less than 24 bpp. Bits
0-23 are used for 24 bpp mode, bits 0-15 are used for
16 bpp mode, bits 0-7 are used for 8 bpp mode, and bits
0-3 are used for 4 bpp mode.
Reserved - Unknown during read
Background - Read/Write
When performing remap operations without transparency
(REMAP = ‘1’ and BG = ‘1’ in the
the value in this field specifies the destination background
pixel color for source pixels that have a value of ‘0’.
Bits that are ‘1’ in this field can be used with Line Draw
functions to specify a ‘blank space’ in the drawn line.
The pixel color value is located in the least significant BPP
part of the field for modes less than 24 bpp.
24
8
BG
BLOCKCTRL
23
7
22
6
21
5
register, the value specifies the
20
4
BG
BLOCKCTRL
19
3
Graphics Accelerator
EP93xx User’s Guide
18
2
register),
17
1
16
8-35
0
8

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