EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 640

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-IQZ

Manufacturer Part Number
EP9302-IQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-IQZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
LQFP
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1253

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9302-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9302-IQZ
Manufacturer:
CIRRUS
Quantity:
20 000
18
Timer1Control,
Timer2Control,
Timer3Control
18-6
Timers
EP93xx User’s Guide
31
15
Address:
Reset Value:
Definition:
Bit Descriptions:
30
14
29
13
28
12
Timer1 - 0x8081_0008 - Read/Write
Timer2 - 0x8081_0028 - Read/Write
Timer3 - 0x8081_0088 - Read/Write
0x0000_0000
The Control register provides enable/disable and mode configurations for the
timer.
RSVD:
ENABLE:
MODE:
CLKSEL:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown during a Read operation.
Timer enable bit. This bit must be set to “1” to enable the
timer. When the timer is disabled, its clock sources are
turned off. Before re-enabling the timer, its Load register
must be written to again.
This bit sets the mode of operation of the timer. When set
to 1, the timer is in periodic timer mode and when set to
“0”, the timer is in free running mode.
When set to “1”, the 508 kHz clock is selected and when
set to “0”, the 2 kHz clock is selected.
24
8
RSVD
ENABLE
23
7
MODE
22
6
21
5
RSVD
20
4
CLKSEL
19
3
18
2
RSVD
17
1
DS785UM1
16
0

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