EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 93

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

DS785UM1
31:28
cond
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
27:25
1 1 0
Table 3-13. Mnemonic Codes for Storing Floating Point Values to Memory
CFSTR32<cond> CRd, [Rn, <offset>]{!}
CFSTR64<cond> CRd, [Rn, <offset>]{!}
Store Integer Values to Memory
CFSTRD<cond> CRd, [Rn, <offset>]{!}
CFSTRS<cond> CRd, [Rn, <offset>]{!}
CFSTR32<cond> CRd, [Rn], <offset>
CFSTR64<cond> CRd, [Rn], <offset>
CFSTRD<cond> CRd, [Rn], <offset>
CFSTRS<cond> CRd, [Rn], <offset>
24
P
Table 3-14. Mnemonic Codes for Storing Integer Values to Memory
N:
Rn:
CRd:
Stores a 32- or 64-bit integer value from a MaverickCrunch register into
memory.
N:
Rn:
CRd:
23
U
Mnemonic
Mnemonic
22
N
21
W
Copyright 2007 Cirrus Logic
20
Floating point precision - 0 for single, 1 for double.
Base register in ARM
Source register.
Integer width - 0 for 32-bit integer, 1 for 64-bit integer
Base register in ARM
Source register.
0
19:16
Rn
15:12
CRd
Immediate post-indexed
Immediate post-indexed
Immediate post-indexed
Immediate post-indexed
Immediate pre-indexed
Immediate pre-indexed
Immediate pre-indexed
Immediate pre-indexed
Addressing Mode
Addressing Mode
0 1 0 1
11:8
MaverickCrunch Co-Processor
8_bit_word_offset
EP93xx User’s Guide
N
0
0
1
1
N
0
0
1
1
7:0
3-23
3