EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 427

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

DS785UM1
PW:
BWC
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
Table 10-9. BWC Decode Values
Copyright 2007 Cirrus Logic
Example: if BWC = 1010b (indicating 1024 bytes, see
Table
bus on completion of the current burst transfer after BCR
values which are within 15 bytes of multiples of 1024.
Peripheral Width. For external DMA transfers, these bits
are used to program the DMA to request byte/half-
word/word wide AHB transfers, depending on the width of
the external device. These bits are not used for software
triggered M2M transfers.
00 - Byte (8 bits)
01 - Half-word (16 bits)
10 - Word (32 bits)
11 - Not used
For word accesses the lower 2 bits of the
source/destination address are ignored.
For half-word accesses the lower bit of the
source/destination address is ignored.
10-9, below), the DMA relinquishes control of the
Full DMA transfer completes
Bytes
16384
32768
1024
2048
4096
8192
128
256
512
16
16
16
16
32
64
EP93xx User’s Guide
DMA Controller
10-33
10