MC9S08EL16CTJ Freescale Semiconductor, MC9S08EL16CTJ Datasheet - Page 200

MCU 16KB FLASH SLIC 20TSSOP

MC9S08EL16CTJ

Manufacturer Part Number
MC9S08EL16CTJ
Description
MCU 16KB FLASH SLIC 20TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08EL16CTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08EL
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SCI, SPI, I2C, SLIC
Maximum Clock Frequency
200 KHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08EL32AUTO, DEMO9S08EL32
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
DEMO9S08EL32 - BOARD DEMO FOR 9S08 EL MCUDEMO9S08EL32AUTO - DEMO BOARD EL32 AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.3.6
The SLIC data length code register (SLCDLC) is the primary functional control register for the SLIC
module during normal LIN operations. It contains the data length code of the message buffer, indicating
how many bytes of data are to be sent or received, as well as the checksum mode control and transmit
enabling bit.
202
CHKMOD
TXGO
Field
DLC
5:0
7
6
Reset
W
R
SLIC Data Length Code Register (SLCDLC)
SLIC Transmit Go — This bit controls whether the SLIC module is sending or receiving data bytes. This bit is
automatically reset to 0 after a transmit operation is complete or an error is encountered and transmission has
been aborted.
0 SLIC receive data
1 Initiate SLIC transmit— The SLIC assumes the user has loaded the proper data into the message buffer and
LIN Checksum Mode — CHKMOD is used to decide what checksum method to use for this message frame.
Resets after error code or message frame complete. CHKMOD must be written (124 desired) only after the
reception of an identifier and before the reception or transmission of data bytes. Writing this bit to a one clears
the current checksum calculation.
0 Checksum calculated 119 the identifier byte included
1 Checksum calculated without the identifier byte (LIN spec <= 1.3)
Data Length Control Bits — The value of the bits indicate the number of data bytes in message. Values
0x00–0x07 are for “normal” LIN messaging. Values 0x08–0x3F are for “extended” LIN messaging. See
Table
TXGO
will begin transmitting the number of bytes indicated in the SLCDLC bits. If the number of bytes is greater than
8, the first 8 bytes will be transmitted and an interrupt will be triggered (if unmasked) for the user to enter the
next bytes of the message. If the number of bytes is 8 or fewer, the SLIC will transmit the appropriate number
of bytes and automatically append the checksum to the transmission. If IMSG or TXABRT are set or the SLCF
flag is set, writes to TXGO will have no effect.
(SAE J2602/LIN 2.0)
0
7
12-11.
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
Figure 12-10. SLIC Data Length Code Register (SLCDLC)
CHKMOD
6
0
DLC[5:0]
0x3D
0x3E
0x00
0x01
0x02
0x3F
...
Table 12-10. SLCDLC Field Descriptions
Table 12-11. Data Length Control
DLC5
0
5
Message Data Length (Number of Bytes)
DLC4
4
0
Description
62
63
64
...
1
2
3
DLC3
0
3
DLC2
2
0
Freescale Semiconductor
DLC1
0
1
DLC0
0
0

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