PIC16LF819T-I/SO Microchip Technology, PIC16LF819T-I/SO Datasheet - Page 130
![IC MCU FLASH 2KX14 EEPROM 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16LF819T-I/SO
Manufacturer Part Number
PIC16LF819T-I/SO
Description
IC MCU FLASH 2KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F818-ISO.pdf
(8 pages)
4.PIC16F818-ISO.pdf
(8 pages)
5.PIC18F2450-ISO.pdf
(324 pages)
Specifications of PIC16LF819T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF819T-I/SO
Manufacturer:
MITSUBISHI
Quantity:
330
Part Number:
PIC16LF819T-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC18F2450-ISO PDF datasheet #5
- Current page: 130 of 324
- Download datasheet (6Mb)
PIC18F2450/4450
The CCPR1H register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation:
EQUATION 13-3:
TABLE 13-3:
TABLE 13-4:
DS39760D-page 128
INTCON
RCON
PIR1
PIE1
IPR1
TRISC
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1:
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Note:
Name
PWM Resolution (max)
PWM Frequency
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
Timer2 Register
Timer2 Period Register
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
GIE/GIEH PEIE/GIEL
TRISC7
IPEN
Bit 7
—
—
—
—
—
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
REGISTERS ASSOCIATED WITH PWM AND TIMER2
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
TRISC6
ADIF
ADIE
ADIP
Bit 6
—
=
log
-----------------------------bits
(1)
2.44 kHz
log
⎛
⎝
---------------
F
F
FFh
PWM
16
10
2 ( )
TMR0IE
OSC
DC1B1
RCIF
RCIE
RCIP
Bit 5
—
—
⎞
⎠
9.77 kHz
DC1B0
INT0IE
FFh
Bit 4
TXIF
TXIE
TXIP
10
4
RI
—
CCP1M3
39.06 kHz
13.4.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
RBIE
Bit 3
TO
FFh
—
—
—
—
10
1
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
appropriate TRIS bit.
Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
Configure the CCP module for PWM operation.
CCP1M2
SETUP FOR PWM OPERATION
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISC2
156.25 kHz
Bit 2
PD
3Fh
1
8
CCP1M1 CCP1M0
TMR2IF
TMR2IE
TMR2IP
TRISC1
© 2008 Microchip Technology Inc.
INT0IF
Bit 1
POR
312.50 kHz
1Fh
1
7
TMR1IE
TMR1IP
TMR1IF
TRISC0
RBIF
Bit 0
BOR
416.67 kHz
6.58
on Page:
17h
Values
1
Reset
50
50
50
50
49
50
51
51
51
51
50
50
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