PIC16LF819T-I/SO Microchip Technology, PIC16LF819T-I/SO Datasheet - Page 32
![IC MCU FLASH 2KX14 EEPROM 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16LF819T-I/SO
Manufacturer Part Number
PIC16LF819T-I/SO
Description
IC MCU FLASH 2KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F818-ISO.pdf
(8 pages)
4.PIC16F818-ISO.pdf
(8 pages)
5.PIC18F2450-ISO.pdf
(324 pages)
Specifications of PIC16LF819T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF819T-I/SO
Manufacturer:
MITSUBISHI
Quantity:
330
Part Number:
PIC16LF819T-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC18F2450-ISO PDF datasheet #5
- Current page: 32 of 324
- Download datasheet (6Mb)
PIC18F2450/4450
2.4
Like
PIC18F2450/4450 family includes a feature that allows
the device clock source to be switched from the main
oscillator to an alternate, low-frequency clock source.
PIC18F2450/4450 devices offer two alternate clock
sources. When an alternate clock source is enabled,
the various power-managed operating modes are
available.
Essentially, there are three clock sources for these
devices:
• Primary oscillators
• Secondary oscillators
• Internal oscillator
The primary oscillators include the External Crystal
and Resonator modes, the External Clock modes and
the internal oscillator. The particular mode is defined by
the FOSC3:FOSC0 Configuration bits. The details of
these modes are covered earlier in this chapter.
The secondary oscillators are those external sources
not connected to the OSC1 or OSC2 pins. These
sources may continue to operate even after the
controller is placed in a power-managed mode.
PIC18F2450/4450 devices offer the Timer1 oscillator
as a secondary oscillator. This oscillator, in all power-
managed modes, is often the time base for functions
such as a Real-Time Clock (RTC). Most often, a
32.768 kHz watch crystal is connected between the
RC0/T1OSO/T1CKI and RC1/T1OSI/UOE pins. Like
the XT and HS Oscillator mode circuits, loading
capacitors are also connected from each pin to ground.
The Timer1 oscillator is discussed in greater detail in
Section 11.3 “Timer1 Oscillator”.
In addition to being a primary clock source, the internal
oscillator is available as a power-managed mode
clock source. The INTRC source is also used as the
clock source for several special features, such as the
WDT and Fail-Safe Clock Monitor.
2.4.1
The OSCCON register (Register 2-1) controls several
aspects of the device clock’s operation, both in full-power
operation and in power-managed modes.
The System Clock Select bits, SCS1:SCS0, select the
clock source. The available clock sources are the primary
clock (defined by the FOSC3:FOSC0 Configuration bits),
the secondary clock (Timer1 oscillator) and the internal
oscillator. The clock source changes immediately, after
one or more of the bits is written to, following a brief clock
transition interval. The SCS bits are cleared on all forms
of Reset.
DS39760D-page 30
previous
Clock Sources and Oscillator
Switching
OSCILLATOR CONTROL REGISTER
PIC18
enhanced
devices,
the
providing the device clock in secondary clock modes. In
INTRC always remains the clock source for features
such as the Watchdog Timer and the Fail-Safe Clock
Monitor.
The OSTS and T1RUN bits indicate which clock source
is currently providing the device clock. The OSTS bit
indicates that the Oscillator Start-up Timer (OST) has
timed out and the primary clock is providing the device
clock in primary clock modes. The T1RUN bit
(T1CON<6>) indicates when the Timer1 oscillator is
power-managed modes, only one of these three bits will
be set at any time. If none of these bits are set, the
INTRC is providing the clock or the internal oscillator has
just started and is not yet stable.
The IDLEN bit determines if the device goes into Sleep
mode, or one of the Idle modes, when the SLEEP
instruction is executed.
The use of the flag and control bits in the OSCCON
register is discussed in more detail in Section 3.0
“Power-Managed Modes”.
2.4.2
PIC18F2450/4450 devices contain circuitry to prevent
clock “glitches” when switching between clock sources.
A short pause in the device clock occurs during the
clock switch. The length of this pause is the sum of two
cycles of the old clock source and three to four cycles
of the new clock source. This formula assumes that the
new clock source is stable.
Clock transitions are discussed in greater detail in
Section 3.1.2 “Entering Power-Managed Modes”.
Note 1: The Timer1 oscillator must be enabled to
2: It is recommended that the Timer1
OSCILLATOR TRANSITIONS
select the secondary clock source. The
Timer1 oscillator is enabled by setting the
T1OSCEN bit in the Timer1 Control regis-
ter (T1CON<3>). If the Timer1 oscillator is
not enabled, then any attempt to select a
secondary clock source will be ignored.
oscillator be operating and stable prior to
switching to it as the clock source; other-
wise, a very long delay may occur while
the Timer1 oscillator starts.
© 2008 Microchip Technology Inc.
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