PIC16LF819T-I/SO Microchip Technology, PIC16LF819T-I/SO Datasheet - Page 90
![IC MCU FLASH 2KX14 EEPROM 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16LF819T-I/SO
Manufacturer Part Number
PIC16LF819T-I/SO
Description
IC MCU FLASH 2KX14 EEPROM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16LF627A-IP.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16F818-ISO.pdf
(8 pages)
4.PIC16F818-ISO.pdf
(8 pages)
5.PIC18F2450-ISO.pdf
(324 pages)
Specifications of PIC16LF819T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF819T-I/SO
Manufacturer:
MITSUBISHI
Quantity:
330
Part Number:
PIC16LF819T-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16LF627A-IP PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC18F2450-ISO PDF datasheet #5
- Current page: 90 of 324
- Download datasheet (6Mb)
PIC18F2450/4450
REGISTER 8-2:
DS39760D-page 88
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
Unimplemented: Read as ‘0’
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
INTEDG0
R/W-1
INTCON2: INTERRUPT CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
INTEDG1
R/W-1
INTEDG2
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
TMR0IP
R/W-1
© 2008 Microchip Technology Inc.
x = Bit is unknown
U-0
—
R/W-1
RBIP
bit 0
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