PIC16F689-I/ML Microchip Technology, PIC16F689-I/ML Datasheet - Page 289

• Manufacturer Part Number: PIC16F689-I/ML
• Description: IC PIC MCU FLASH 4KX14 20QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F689-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 18
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/SSP/EUSART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DM164120
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reset................................................................................. 196
Revision History ................................................................ 281
S
S (Start) bit ........................................................................ 176
Shoot-through Current ...................................................... 143
Slave Select Synchronization ........................................... 181
Sleep ................................................................................. 210
SMP bit ............................................................................. 176
Software Simulator (MPLAB SIM)..................................... 224
SPBRG ............................................................................. 161
SPBRGH ........................................................................... 161
Special Event Trigger........................................................ 111
Special Function Registers ................................................. 26
© 2007 Microchip Technology Inc.
EEADR (EEPROM Address) .................................... 120
EECON1 (EEPROM Control 1)................................. 121
EEDAT (EEPROM Data) .......................................... 120
EEDATH (EEPROM Data)........................................ 120
INTCON (Interrupt Control)......................................... 38
IOCA (Interrupt-on-Change PORTA) .......................... 62
IOCB (Interrupt-on-Change PORTB) .......................... 70
OPTION_REG (OPTION) ..................................... 37, 83
OSCCON (Oscillator Control) ..................................... 48
OSCTUNE (Oscillator Tuning) .................................... 52
PCON (Power Control Register) ................................. 43
PCON (Power Control) ............................................. 199
PIE1 (Peripheral Interrupt Enable 1)........................... 39
PIE2 (Peripheral Interrupt Enable 2)........................... 40
PIR1 (Peripheral Interrupt Register 1) ........................ 41
PIR2 (Peripheral Interrupt Request 2) ........................ 42
PORTA........................................................................ 59
PORTB........................................................................ 69
PORTC ....................................................................... 76
PSTRCON (Pulse Steering Control) ......................... 145
PWMxCON (Enhanced PWM Control) ..................... 144
RCSTA (Receive Status and Control)....................... 159
Reset Values............................................................. 201
Reset Values (special registers) ............................... 203
Special Function Register Map
Special Function Registers ......................................... 26
Special Register Summary
SRCON (SR Latch Control) ...................................... 103
SSPCON (Sync Serial Port Control) Register........... 177
SSPMSK (SSP Mask)............................................... 187
SSPSTAT (Sync Serial Port Status) Register........... 176
STATUS...................................................................... 36
T1CON........................................................................ 88
T2CON........................................................................ 92
TRISA (Tri-State PORTA)........................................... 59
TRISB (Tri-State PORTB)........................................... 70
TRISC (Tri-State PORTC) .......................................... 76
TXSTA (Transmit Status and Control) ...................... 158
VRCON (Voltage Reference Control) ....................... 106
WDTCON (Watchdog Timer Control) ....................... 209
WPUA (Weak Pull-Up PORTA) .................................. 62
WPUB (Weak Pull-up PORTB) ................................... 70
Wake-up.................................................................... 210
Wake-up Using Interrupts ......................................... 210
PIC16F677.......................................................... 28
PIC16F685.................................................... 27, 29
PIC16F687/689................................................... 30
PIC16F690.......................................................... 31
Bank 0................................................................. 32
Bank 1................................................................. 33
Bank 2................................................................. 34
Bank 3................................................................. 35
PIC16F631/677/685/687/689/690
SPI Mode .................................................................. 175, 181
SRCON Register .............................................................. 103
SSP
SSP I
SSP Module
SSPCON Register ............................................................ 177
SSPEN bit......................................................................... 177
SSPM bits ......................................................................... 177
SSPMSK Register ............................................................ 187
SSPOV bit ........................................................................ 177
SSPSTAT Register ........................................................... 176
STATUS Register ............................................................... 36
Synchronous Serial Port Enable bit (SSPEN) .................. 177
Synchronous Serial Port Mode Select bits (SSPM).......... 177
Synchronous Serial Port. See SSP
T
T1CON Register ................................................................. 88
T2CON Register ................................................................. 92
Thermal Considerations.................................................... 236
Time-out Sequence .......................................................... 199
Timer0 ................................................................................ 81
Timer1 ................................................................................ 84
Associated Registers................................................ 183
Bus Mode Compatibility ............................................ 183
Effects of a Reset ..................................................... 183
Enabling SPI I/O ....................................................... 179
Master Mode............................................................. 180
Master/Slave Connection ......................................... 179
Serial Clock (SCK pin) .............................................. 175
Serial Data In (SDI pin)............................................. 175
Serial Data Out (SDO pin) ........................................ 175
Slave Select.............................................................. 175
Slave Select Synchronization ................................... 181
Sleep Operation........................................................ 183
SPI Clock.................................................................. 180
Typical Connection ................................................... 179
Overview
SPI Master/Slave Connection................................... 179
Slave Mode............................................................... 184
Clock Synchronization and the CKP Bit ................... 191
SPI Master Mode...................................................... 180
SPI Slave Mode........................................................ 181
SSPBUF ................................................................... 180
SSPSR ..................................................................... 180
Associated Registers.................................................. 83
External Clock ............................................................ 82
Interrupt ...................................................................... 83
Operation.............................................................. 81, 84
Specifications ........................................................... 243
T0CKI ......................................................................... 82
Associated registers ................................................... 89
Asynchronous Counter Mode ..................................... 85
Interrupt ...................................................................... 86
Modes of Operation .................................................... 84
Operation During Sleep .............................................. 86
Oscillator..................................................................... 85
Prescaler .................................................................... 85
Specifications ........................................................... 243
Timer1 Gate
TMR1H Register......................................................... 84
TMR1L Register ......................................................... 84
2
C Operation ........................................................... 184
Reading and Writing ........................................... 85
Inverting Gate ..................................................... 86
Selecting Source ........................................ 85, 101
Synchronizing COUT w/Timer1 ........................ 101
DS41262D-page 287