ATA6617-P3QW Atmel, ATA6617-P3QW Datasheet - Page 142

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ATA6617-P3QW

Manufacturer Part Number
ATA6617-P3QW
Description
MCU W/LIN TX/5V REG/WTCDG 38VQFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6617-P3QW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6617-P3QW
Manufacturer:
ATMEL
Quantity:
3 500
Part Number:
ATA6617-P3QW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Using the Input Capture unit in any mode of operation when the TOP value (resolution) is
actively changed during operation, is not recommended.
Measurement of an external signal’s duty cycle requires that the trigger edge is changed after
each capture. Changing the edge sensing must be done as early as possible after the ICR1
Register has been read. After a change of the edge, the Input Capture Flag (ICF1) must be
cleared by software (writing a logical one to the I/O bit location). For measuring frequency
only, the clearing of the ICF1 flag is not required (if an interrupt handler is used).
4.13.7
Output Compare Units
The 16-bit comparator continuously compares TCNT1 with the Output Compare Register
(OCR1A/B). If TCNT equals OCR1A/B the comparator signals a match. A match will set the
Output Compare Flag (OCF1A/B) at the next timer clock cycle. If enabled (OCIE1A/B = 1), the
Output Compare Flag generates an Output Compare interrupt. The OCF1A/B flag is automati-
cally cleared when the interrupt is executed. Alternatively the OCF1A/B flag can be cleared by
software by writing a logical one to its I/O bit locations. The Waveform Generator uses the
match signal to generate an output according to operating mode set by the Waveform Gener-
ation mode (WGM13:0) bits and Compare Output mode (COM1A/B1:0) bits. The TOP and
BOTTOM signals are used by the Waveform Generator for handling the special cases of the
extreme values in some modes of operation
(See “Modes of Operation” on page
147.)
A special feature of Output Compare unit A allows it to define the Timer/Counter TOP value
(i.e., counter resolution). In addition to the counter resolution, the TOP value defines the
period time for waveforms generated by the Waveform Generator.
Figure 4-47
shows a block diagram of the Output Compare unit. The elements of the block dia-
gram that are not directly a part of the Output Compare unit are gray shaded.
Atmel ATA6616/ATA6617
142
9132D–AUTO–12/10

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