PIC16C781T-I/SO Microchip Technology, PIC16C781T-I/SO Datasheet - Page 124

• Manufacturer Part Number: PIC16C781T-I/SO
• Description: IC MCU CMOS 8BIT 1K 20MHZ 20SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C781T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• For Use With: AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Other names: PIC16C781TI/SO

PIC16C781/782
14.4
A Power-on Reset pulse is generated on-chip when a
V
take advantage of the POR, simply enable the internal
MCLR feature. This eliminates external RC compo-
nents usually needed to create a Power-on Reset. A
maximum rise time for V
Section 17.0 for details. For a slow rise time, see
Figure 14-5.
Two delay timers (PWRT on OST) are provided, which
hold the device in RESET after a POR (dependent
upon device configuration), so that all operational
parameters have been met prior to releasing the device
to resume/begin normal operation.
When the device starts normal operation (exits the
RESET condition), device operating parameters (i.e.,
voltage, frequency, temperature,...) must be met to
ensure operation. If these conditions are not met, the
device must be held in RESET until the operating con-
ditions are met. Brown-out Reset may be used to meet
the start-up conditions, or if necessary an external POR
circuit may be implemented to delay end of RESET for
as long as needed.
FIGURE 14-5:
DS41171A-page 122
DD
Note 1: External Power-on Reset circuit is required
rise is detected (in the range of 1.5V - 2.1V). To
V
DD
D
Power-on Reset (POR)
2: R < 40 k is recommended to make sure that
3: R1 = 100
V
only if V
diode D helps discharge the capacitor quickly
when V
voltage drop across R does not violate the
device’s electrical specification.
ing into MCLR from external capacitor C in
the event of MCLR pin breakdown due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
DD
R
C
DD
DD
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
powers down.
to 1 k will limit any current flow-
R1
power-up slope is too slow. The
DD
MCLR
PIC16C781/782
DD
is specified. See
RAMP)
Preliminary
14.5
The Power-up Timer provides a fixed T
on power-up type RESETS only. For a POR, the PWRT
is invoked when the POR pulse is generated. For a
BOR, the PWRT is invoked when the device exits the
RESET condition (V
The Power-up Timer operates on an internal RC oscil-
lator. The chip is kept in RESET as long as the PWRT
is active. The PWRT’s time delay is designed to allow
V
(PWRT) is provided to enable/disable the PWRT for the
POR only. For a BOR the PWRT is always available
regardless of the configuration bit setting.
The power-up time delay varies from chip-to-chip due
to V
parameters for details.
14.6
The Programmable Brown-out Reset module is used to
generate a RESET when the supply voltage falls below
a specified trip voltage. The trip voltage is configurable
to any one of four voltages provided by the BORV<1:0>
configuration word bits.
Configuration bit BODEN can disable (if clear/pro-
grammed), or enable (if set), the Brown-out Reset cir-
cuitry. If V
longer than T
Table 17-6), the brown-out situation resets the chip. A
RESET may not occur if V
for less than T
Reset until V
is invoked at that point and keeps the chip in RESET an
additional T
Power-up Timer is running, the chip goes back into a
Brown-out Reset and the Power-up Timer is re-
initialized. Once V
Timer again begins a T
14.7
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked by the POR pulse.
When the PWRT delay expires, the Oscillator Start-up
Timer is activated. The total time-out varies depending
on oscillator configuration and the status of the PWRT.
For example, in RC mode with the PWRT disabled,
there is no time-out at all. Figure 14-6, and Figure 14-9
depict time-out sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs expire. Then,
bringing MCLR high begins execution immediately.
This is useful for testing purposes or to synchronize
more than one PICmicro microcontroller operating in
parallel.
Table 14-5 shows the RESET conditions for some spe-
cial function registers.
DD
DD
to rise to an acceptable level. A configuration bit
, temperature and process variation. See DC
Power-up Timer (PWRT)
Programmable Brown-out Reset
(PBOR)
Time-out Sequence
DD
PWRT
DD
BOR
falls below the specified trip point for
rises above V
BOR
. If V
DD
. The chip remains in Brown-out
(see Parameter 35, Section 17.0,
DD
rises above V
DD
PWRT
rises above BOR trip point).
drops below V
2001 Microchip Technology Inc.
DD
time delay.
BOR
falls below the trip point
. The Power-up Timer
BOR
, the Power-up
PWRT
BOR
while the
time-out