PIC18F67K22-I/PTRSL Microchip Technology, PIC18F67K22-I/PTRSL Datasheet - Page 238
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PIC18F67K22-I/PTRSL
Manufacturer Part Number
PIC18F67K22-I/PTRSL
Description
MCU PIC 128K FLASH XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18F65K22T-IPTRSL.pdf
(548 pages)
3.PIC18F65K22T-IPTRSL.pdf
(10 pages)
Specifications of PIC18F67K22-I/PTRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F722-ISS PDF datasheet
- PIC18F65K22T-IPTRSL PDF datasheet #2
- PIC18F65K22T-IPTRSL PDF datasheet #3
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PIC18F87K22 FAMILY
TABLE 18-4:
18.2.9
The real-time crystal input can be calibrated using the
periodic auto-adjust feature. When properly calibrated,
the RTCC can provide an error of less than three
seconds per month.
To perform this calibration, find the number of error
clock pulses and store the value into the lower half of
the RTCCAL register. The eight-bit, signed value,
loaded into RTCCAL, is multiplied by four and will be
either added or subtracted from the RTCC timer, once
every minute.
To calibrate the RTCC module:
1.
2.
EQUATION 18-1:
3.
DS39960B-page 238
ALRMPTR<1:0>
(Ideal Frequency (32,758) – Measured Frequency) * 60 =
Error Clocks per Minute
Use another timer resource on the device to find
the error of the 32.768 kHz crystal.
Convert the number of error clock pulses per
minute (see Equation 18-1).
• If the oscillator is faster than ideal (negative
• If the oscillator is slower than ideal (positive
Load the RTCCAL register with the correct
value.
result from step 2), the RCFGCALL register
value needs to be negative. This causes the
specified number of clock pulses to be
subtracted from the timer counter once every
minute.
result from step 2), the RCFGCALL register
value needs to be positive. This causes the
specified number of clock pulses to be added to
the timer counter once every minute.
00
01
10
11
CALIBRATION
ALRMVAL REGISTER
MAPPING
Alarm Value Register Window
ALRMMNTH
ALRMVALH
ALRMMIN
ALRMWD
CONVERTING ERROR
CLOCK PULSES
—
ALRMVALL
ALRMSEC
ALRMDAY
ALRMHR
—
Preliminary
Writes to the RTCCAL register should occur only when
the timer is turned off or immediately after the rising
edge of the seconds pulse.
18.3
The Alarm features and characteristics are:
• Configurable from half a second to one year
• Enabled using the ALRMEN bit (ALRMCFG<7>,
• Offers one-time and repeat alarm options
18.3.1
The alarm feature is enabled using the ALRMEN bit.
This bit is cleared when an alarm is issued. The bit will
not be cleared if the CHIME bit = 1 or if ALRMRPT 0.
The interval selection of the alarm is configured
through the ALRMCFG bits (AMASK<3:0>); see
Figure 18-5. These bits determine which and how
many digits of the alarm must match the clock value for
the alarm to occur.
The alarm can also be configured to repeat based on a
preconfigured interval. The number of times this
occurs, after the alarm is enabled, is stored in the
ALRMRPT register.
Note:
Register 18-4)
Note:
Alarm
In determining the crystal’s error value, it
is the user’s responsibility to include the
crystal’s initial error from drift due to
temperature or crystal aging.
CONFIGURING THE ALARM
While the alarm is enabled (ALRMEN = 1),
changing any of the registers, other than
the RTCCAL, ALRMCFG and ALRMRPT
registers and the CHIME bit, can result in
a false alarm event leading to a false
alarm interrupt. To avoid this, only change
the timer and alarm values while the alarm
is disabled (ALRMEN = 0). It is recom-
mended
ALRMRPT registers and CHIME bit be
changed when RTCSYNC = 0.
that
2010 Microchip Technology Inc.
the
ALRMCFG
and
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