PIC18F67K22-I/PTRSL Microchip Technology, PIC18F67K22-I/PTRSL Datasheet - Page 47
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F67K22-I/PTRSL
Manufacturer Part Number
PIC18F67K22-I/PTRSL
Description
MCU PIC 128K FLASH XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18F65K22T-IPTRSL.pdf
(548 pages)
3.PIC18F65K22T-IPTRSL.pdf
(10 pages)
Specifications of PIC18F67K22-I/PTRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F722-ISS PDF datasheet
- PIC18F65K22T-IPTRSL PDF datasheet #2
- PIC18F65K22T-IPTRSL PDF datasheet #3
- Current page: 47 of 548
- Download datasheet (5Mb)
The use of the flag and control bits in the OSCCON
register is discussed in more detail in Section 4.0
“Power-Managed Modes”.
3.3.2.1
Since the SCS bits are cleared on all forms of Reset,
this means the primary oscillator, defined by the
FOSC<3:0> Configuration bits, is used as the primary
clock source on device Resets. This could either be the
internal oscillator block by itself, or one of the other
primary clock source (HS, EC, XT, LP, External RC and
PLL-enabled modes).
In those cases when the internal oscillator block, with-
out PLL, is the default clock on Reset, the Fast RC
oscillator (INTOSC) will be used as the device clock
source. It will initially start at 8 MHz; the postscaler
selection that corresponds to the Reset value of the
IRCF<2:0> bits (‘110’).
Regardless of which primary oscillator is selected,
INTRC will always be enabled on device power-up. It
serves as the clock source until the device has loaded
its configuration values from memory. It is at this point
that the FOSC Configuration bits are read and the
oscillator selection of the operational mode is made.
Note that either the primary clock source or the internal
oscillator will have two bit setting options for the possible
values of the SCS<1:0> bits, at any given time.
3.3.3
PIC18F87K22 family devices contain circuitry to
prevent clock “glitches” when switching between clock
sources. A short pause in the device clock occurs
during the clock switch. The length of this pause is the
sum of two cycles of the old clock source and three to
four cycles of the new clock source. This formula
assumes that the new clock source is stable.
Clock transitions are discussed in greater detail in
Section 4.1.2 “Entering Power-Managed Modes”.
2010 Microchip Technology Inc.
Note 1: The Timer1/3/5/7 oscillator must be
2: It is recommended that the Timerx
OSCILLATOR TRANSITIONS
enabled to select the secondary clock
source. The Timerx oscillator is enabled by
setting the TxOSCEN bit in the Timerx
Control register (TxCON<3>). If the Timerx
oscillator is not enabled, then any attempt
to select a secondary clock source when
executing a SLEEP instruction will be
ignored.
oscillator be operating and stable before
executing the SLEEP instruction or a very
long delay may occur while the Timerx
oscillator starts.
System Clock Selection and Device
Resets
Preliminary
PIC18F87K22 FAMILY
3.4
For timing-insensitive applications, the RC and RCIO
Oscillator modes offer additional cost savings. The
actual oscillator frequency is a function of several
factors:
• Supply voltage
• Values of the external resistor (R
• Operating temperature
Given the same device, operating voltage and temper-
ature, and component values, there will also be unit to
unit frequency variations. These are due to factors,
such as:
• Normal manufacturing variation
• Difference in lead frame capacitance between
• Variations within the tolerance of limits of R
In the RC Oscillator mode, the oscillator frequency,
divided by 4, is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 3-2 shows how the R/C combination is
connected.
FIGURE 3-2:
The RCIO Oscillator mode (Figure 3-3) functions like
the RC mode, except that the OSC2 pin becomes an
additional general purpose I/O pin. The I/O pin
becomes bit 6 of PORTA (RA6).
FIGURE 3-3:
C
V
C
V
Recommended values: 3 k R
Recommended values: 3 k R
(C
package types (especially for low C
and C
R
R
EXT
SS
EXT
SS
EXT
EXT
EXT
V
V
DD
DD
)
EXT
RC Oscillator
RA6
F
OSC
/4
RC OSCILLATOR MODE
OSC1
RCIO OSCILLATOR MODE
OSC1
OSC2/CLKO
I/O (OSC2)
20 pF C
20 pF C
EXT
EXT
EXT
EXT
EXT
100 k
100 k
300 pF
300 pF
DS39960B-page 47
EXT
PIC18FXXXX
PIC18FXXXX
) and capacitor
values)
Internal
Internal
Clock
Clock
EXT
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