PIC18F67K22-I/PTRSL Microchip Technology, PIC18F67K22-I/PTRSL Datasheet - Page 313
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F67K22-I/PTRSL
Manufacturer Part Number
PIC18F67K22-I/PTRSL
Description
MCU PIC 128K FLASH XLP 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC18F65K22T-IPTRSL.pdf
(548 pages)
3.PIC18F65K22T-IPTRSL.pdf
(10 pages)
Specifications of PIC18F67K22-I/PTRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3862Byte
Cpu Speed
16MIPS
No. Of Timers
11
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K22-I/PTRSL
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F722-ISS PDF datasheet
- PIC18F65K22T-IPTRSL PDF datasheet #2
- PIC18F65K22T-IPTRSL PDF datasheet #3
- Current page: 313 of 548
- Download datasheet (5Mb)
21.4.8
To initiate a Start condition, the user sets the Start
Enable bit, SEN (SSPxCON2<0>). If the SDAx and
SCLx pins are sampled high, the Baud Rate Generator
is reloaded with the contents of SSPxADD<6:0> and
starts its count. If SCLx and SDAx are both sampled
high when the Baud Rate Generator times out (T
the SDAx pin is driven low. The action of the SDAx
being driven low while SCLx is high is the Start condi-
tion and causes the S bit (SSPxSTAT<3>) to be set.
Following this, the Baud Rate Generator is reloaded
with the contents of SSPxADD<6:0> and resumes its
count. When the Baud Rate Generator times out
(T
automatically cleared by hardware. The Baud Rate
Generator is suspended, leaving the SDAx line held low
and the Start condition is complete.
FIGURE 21-21:
2010 Microchip Technology Inc.
BRG
), the SEN bit (SSPxCON2<0>) will be
I
CONDITION TIMING
2
C™ MASTER MODE START
Write to SEN bit Occurs Here
FIRST START BIT TIMING
SDAx
SCLx
SDAx = 1,
SCLx = 1
T
BRG
BRG
Preliminary
),
Set S bit (SSPxSTAT<3>)
T
S
BRG
PIC18F87K22 FAMILY
At Completion of Start bit,
Hardware Clears SEN bit
21.4.8.1
If the user writes the SSPxBUF when a Start sequence
is in progress, the WCOL bit is set and the contents of
the buffer are unchanged (the write doesn’t occur).
and Sets SSPxIF bit
Note:
Note:
Write to SSPxBUF Occurs Here
T
BRG
1st bit
If, at the beginning of the Start condition,
the SDAx and SCLx pins are already
sampled low or if during the Start condi-
tion, the SCLx line is sampled low before
the SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I
Idle state.
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPxCON2 is disabled until the Start
condition is complete.
WCOL Status Flag
T
BRG
2nd bit
2
C module is reset into its
DS39960B-page 313
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