PIC18F4431-I/ML Microchip Technology, PIC18F4431-I/ML Datasheet - Page 194

• Manufacturer Part Number: PIC18F4431-I/ML
• Description: IC PIC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PIC18F2331/2431/4331/4431
17.4.4
This mode is available in Continuous Up/Down Count
mode. In the Double Update mode (PTMOD<1:0> = 11),
an interrupt event is generated each time the PTMR
register is equal to zero and each time the PTMR
matches with PTPER register. Figure 17-8 shows the
interrupts in Continuous Up/Down Count mode with
double updates.
The Double Update mode provides two additional
functions to the user in Center-Aligned mode.
1.
2.
FIGURE 17-8:
DS39616C-page 192
Note 1: Interrupt flag bit, PTIF, is sampled here (every Q1).
PTMR_INT_REQ
PTMR_INT_REQ
A: PRESCALER = 1:1
The control loop bandwidth is doubled because
the PWM duty cycles can be updated twice per
period.
Asymmetrical center-aligned PWM waveforms
can be generated, which are useful for
minimizing output waveform distortion in certain
motor control applications.
PTDIR bit
PTDIR bit
2: PWM Time Base Period register, PTPER, is loaded with the value 3FFh for this example.
PTIF bit
PTIF bit
PTMR
PTMR
OSC1
OSC1
INTERRUPTS IN DOUBLE UPDATE
MODE
Case 1: PTMR Counting Upwards
Case 2: PTMR Counting Downwards
Q1
1
Q1
1
Q2
Q2
PWM TIME BASE INTERRUPT, CONTINUOUS UP/DOWN COUNT MODE WITH
DOUBLE UPDATES
3FDh
002h
Q3
Q3
Q4
Q4
Q1
1
Q1
1
Q2
Q2
3FEh
001h
Q3
Q3
Preliminary
Q4
Q4
Q1
Q1
1
1
2
Q2
Q2
3FFh
000h
Note:
Q3
Q3
Q4
Q4
Do not change PTMOD while PTEN is
active. It will yield unexpected results. To
change the PWM Timer mode of opera-
tion, first clear PTEN bit, load PTMOD with
required data and then set PTEN.
Q1
Q1
1
1
Q2
Q2
3FEh
001h
Q3
Q3
© 2007 Microchip Technology Inc.
Q4
Q4
Q1
Q1
Q2
Q2
002h
3FDh
Q3
Q3
Q4
Q4