PIC18F4431-I/ML Microchip Technology, PIC18F4431-I/ML Datasheet - Page 206

IC PIC MCU FLASH 8KX16 44QFN

PIC18F4431-I/ML

Manufacturer Part Number
PIC18F4431-I/ML
Description
IC PIC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-I/ML

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
9 bit
Package
44QFN EP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / Rohs Status
 Details
PIC18F2331/2431/4331/4431
17.10.3
Figure 17-21 shows an example of a waveform that
might be generated using the PWM output override
feature. The figure shows a six-step commutation
sequence for a BLDC motor. The motor is driven
through a 3-phase inverter as shown in Figure 17-16.
When the appropriate rotor position is detected, the
PWM outputs are switched to the next commutation
state in the sequence. In this example, the PWM out-
puts are driven to specific logic states. The OVDCOND
and OVDCONS register values used to generate the
signals in Figure 17-21 are given in Table 17-4.
REGISTER 17-6:
REGISTER 17-7:
DS39616C-page 204
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
POVD7
POUT7
R/W-1
R/W-0
(1)
(1)
Unimplemented in PIC18F2331/2431 devices; maintain these bits clear.
Unimplemented in PIC18F2331/2431 devices; maintain these bits clear.
OUTPUT OVERRIDE EXAMPLES
POVD7:POVD0: PWM Output Override bits
1 = Output on PWM I/O pin is controlled by the value in the Duty Cycle register and the PWM time base
0 = Output on PWM I/O pin is controlled by the value in the corresponding POUT bit
POUT7:POUT0: PWM Manual Output bits
1 = Output on PWM I/O pin is active when the corresponding PWM output override bit is cleared
0 = Output on PWM I/O pin is inactive when the corresponding PWM output override bit is cleared
POVD6
POUT6
R/W-1
R/W-0
OVDCOND: OUTPUT OVERRIDE CONTROL REGISTER
OVDCONS: OUTPUT STATE REGISTER
(1)
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
POVD5
POUT5
R/W-1
R/W-0
POVD4
POUT4
R/W-1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
POVD3
POUT3
R/W-1
R/W-0
The PWM Duty Cycle registers may be used in con-
junction with the OVDCOND and OVDCONS registers.
The Duty Cycle registers control the average voltage
across the load and the OVDCOND and OVDCONS
registers
Figure 17-22 shows the waveforms, while Table 17-4
and Table 17-5 show the OVDCOND and OVDCONS
register values used to generate the signals.
control
POVD2
POUT2
R/W-1
R/W-0
the
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
commutation
POVD1
POUT1
R/W-1
R/W-0
POVD0
POUT0
R/W-1
R/W-0
sequence.
bit 0
bit 0

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