PIC18F4431-I/ML Microchip Technology, PIC18F4431-I/ML Datasheet - Page 330

• Manufacturer Part Number: PIC18F4431-I/ML
• Description: IC PIC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-I/ML

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: EUSART, I2C, SPI, SSP
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9 bit
• Package: 44QFN EP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PIC18F2331/2431/4331/4431
TBLWT
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
DS39616C-page 328
Table Write
[ label ]
None
if TBLWT*,
(TABLAT) → Holding Register,
TBLPTR – No Change;
if TBLWT*+,
(TABLAT) → Holding Register,
(TBLPTR) + 1 → TBLPTR;
if TBLWT*-,
(TABLAT) → Holding Register,
(TBLPTR) – 1 → TBLPTR;
if TBLWT+*,
(TBLPTR) + 1 → TBLPTR,
(TABLAT) → Holding Register
None
This instruction uses the 3 LSBs of
TBLPTR to determine which of the 8
holding registers the TABLAT is written to.
The holding registers are used to program
the contents of Program Memory (P.M.).
(Refer to Section 6.0 “Flash Program
Memory” for additional details on
programming Flash memory.)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory.
TBLPTR has a 2-Mbyte address range.
The LSb of the TBLPTR selects which
byte of the program memory location to
access.
The TBLWT instruction can modify the
value of TBLPTR as follows:
• no change
• post-increment
• post-decrement
• pre-increment
TBLPTR[0] = 0: Least Significant Byte
TBLPTR[0] = 1: Most Significant Byte
0000
TBLWT ( *; *+; *-; +*)
0000
of Program Memory
Word
of Program Memory
Word
0000
nn = 0 *
11nn
=1 *+
=2 *-
=3 +*
Preliminary
TBLWT Table Write (Continued)
Words:
Cycles: 2
Q Cycle Activity:
Example 1:
Example 2:
Before Instruction
After Instructions (table write completion)
Before Instruction
After Instruction (table write completion)
1
TABLAT
TBLPTR
HOLDING REGISTER
(0x00A356)
TABLAT
TBLPTR
HOLDING REGISTER
(0x00A356)
TABLAT
TBLPTR
HOLDING REGISTER
(0x01389A)
HOLDING REGISTER
(0x01389B)
TABLAT
TBLPTR
HOLDING REGISTER
(0x01389A)
HOLDING REGISTER
(0x01389B)
operation
Decode
Q1
No
TBLWT
TBLWT
operation
operation
TABLAT)
© 2007 Microchip Technology Inc.
(Read
Q2
No
No
*+;
+*;
=
=
=
=
=
=
=
=
=
=
=
=
=
=
operation
operation
0x55
0x00A356
0xFF
0x55
0x00A357
0x55
0x34
0x01389A
0xFF
0xFF
0x34
0x01389B
0xFF
0x34
Q3
No
No
Register )
operation
operation
(Write to
Holding
Q4
No
No