PIC18F2539-I/SP Microchip Technology, PIC18F2539-I/SP Datasheet - Page 234

• Manufacturer Part Number: PIC18F2539-I/SP
• Description: IC MCU FLASH 12KX16 EE A/D 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2539-I/SP

• Core Size: 8-Bit
• Program Memory Size: 24KB (12K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1408 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 21
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1.375KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1408 B
• Interface Type: I2C, SPI, AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DV164005, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / Rohs Status: Details

PIC18FXX39
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
Description:
Words:
Cycles:
Example:
DS30485A-page 232
Q Cycle Activity:
After Instruction
operation
Decode
PC =
No
Q1
Read literal
Address (THERE)
operation
Unconditional Branch
[ label ]
0 ≤ k ≤ 1048575
k → PC<20:1>
None
GOTO allows an unconditional
branch anywhere within entire
2 Mbyte memory range. The 20-bit
value ‘k’ is loaded into PC<20:1>.
GOTO is always a two-cycle
instruction.
2
2
'k'<7:0>,
GOTO THERE
1110
1111
No
Q2
GOTO k
k
1111
19
operation
operation
kkk
No
No
Q3
k
kkkk
7
kkk
Read literal
Write to PC
’k’<19:8>,
operation
No
Q4
kkkk
kkkk
Preliminary
0
8
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
C
DC
CNT
Z
C
DC
Q1
=
=
=
=
=
=
=
=
register 'f'
Increment f
[ label ]
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f) + 1 → dest
The contents of register 'f' are
incremented. If 'd' is 0, the result is
placed in W. If 'd' is 1, the result is
placed back in register 'f' (default).
If ‘a’ is 0, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ = 1, then the bank will be
selected as per the BSR value
(default).
1
1
INCF
C, DC, N, OV, Z
Read
0010
Q2
0xFF
0
?
?
0x00
1
1
1
 2002 Microchip Technology Inc.
INCF
10da
CNT, 1, 0
Process
Data
Q3
f [,d [,a]
ffff
destination
Write to
Q4
ffff