DSPIC30F5015-30I/PT Microchip Technology, DSPIC30F5015-30I/PT Datasheet - Page 222

IC DSPIC MCU/DSP 66K 64TQFP

DSPIC30F5015-30I/PT

Manufacturer Part Number
DSPIC30F5015-30I/PT
Description
IC DSPIC MCU/DSP 66K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F5015-30I/PT

Program Memory Type
FLASH
Program Memory Size
66KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
52
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
52
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
Minimum Operating Temperature
- 40 C
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F501530IPT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F5015-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F5015-30I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F5015-30I/PT
0
dsPIC30F5015/5016
Core
Core Overview ................................................................... 17
CPU Architecture Overview ............................................... 17
Customer Change Notification Service ............................ 226
Customer Notification Service .......................................... 226
Customer Support ............................................................ 226
D
Data Address Space .......................................................... 29
Data EEPROM Memory ..................................................... 57
DC Characteristics ........................................................... 176
Development Support ...................................................... 171
Device Configuration
Device Configuration Registers ........................................ 147
Device Overview .................................................................. 9
Divide Support .................................................................... 20
DSP Engine ........................................................................ 20
dsPIC30F5015 PORT
dsPIC30F5016 PORT
Dual Output Compare Match Mode ................................... 86
DS70149D-page 222
Register Map .............................................................. 34
Alignment ................................................................... 32
Alignment (Figure) ..................................................... 32
Effect of Invalid Memory Accesses ............................ 32
MCU and DSP (MAC Class) Instructions Example .... 31
Memory Map ........................................................ 29, 30
Near Data Space ....................................................... 33
Software Stack ........................................................... 33
Spaces ....................................................................... 32
Width .......................................................................... 32
Erasing ....................................................................... 58
Erasing, Block ............................................................ 58
Erasing, Word ............................................................ 58
Protection Against Spurious Write ............................. 60
Reading ...................................................................... 57
Write Verify ................................................................ 60
Writing ........................................................................ 59
Writing, Block ............................................................. 60
Writing, Word ............................................................. 59
I/O Pin Input Specifications ...................................... 181
I/O Pin Output Specifications ................................... 182
Idle Current (I
Operating Current (I
Operating MIPS vs Voltage
Power-Down Current (I
Program and EEPROM ............................................ 183
Temperature and Voltage Specifications ................. 177
Thermal Operating Conditions ................................. 176
Register Map ............................................................ 149
FBORPOR ............................................................... 147
FGS .......................................................................... 147
FOSC ....................................................................... 147
FWDT ....................................................................... 147
Data Accumulators and Adder/Subtracter ................. 22
Multiplier ..................................................................... 22
Register Map .............................................................. 63
Register Map .............................................................. 64
Continuous Pulse Mode ............................................. 86
Single Pulse Mode ..................................................... 86
dsPIC30F5015 ................................................. 176
dsPIC30F5016 ................................................. 176
Accumulator Write Back ..................................... 23
Data Space Write Saturation ............................. 24
Overflow and Saturation .................................... 22
Round Logic ....................................................... 23
IDLE
) ................................................... 179
DD
) ............................................ 178
PD
) ....................................... 180
E
Electrical Characteristics ................................................. 175
Equations
Errata ................................................................................... 7
F
Fast Context Saving .......................................................... 47
Flash Program Memory ..................................................... 51
I
I/O Ports ............................................................................. 61
Idle Current (I
In-Circuit Debugger .......................................................... 148
In-Circuit Serial Programming (ICSP) ........................ 51, 135
Initialization Condition for RCON Register Case 1 .......... 145
Initialization Condition for RCON Register Case 2 .......... 145
Input Capture Module ........................................................ 81
Input Change Notification Module ...................................... 65
Instruction Addressing Modes ........................................... 37
Instruction Set
Internet Address .............................................................. 226
Interrupt Vector Table (IVT) ............................................... 47
Interrupts ............................................................................ 43
I
2
C Master Mode
A/D Conversion Clock .............................................. 154
Baud Rate ................................................................ 121
PWM Period ............................................................... 98
PWM Period (Up/Down Mode) .................................. 98
PWM Resolution ........................................................ 98
Serial Clock Rate ..................................................... 114
Time Quantum for Clock Generation ....................... 131
Erasing a Row ........................................................... 53
Initiating Programming Sequence .............................. 54
Loading Write Latches ............................................... 54
Operations ................................................................. 53
Programming Algorithm ............................................. 53
Table Instruction Operation Summary ....................... 51
Parallel I/O (PIO) ....................................................... 61
Interrupts ................................................................... 82
Operation During Sleep and Idle Modes .................... 82
Register Map ............................................................. 83
Simple Capture Event Mode ...................................... 81
Register Map (Bits 15-8 for dsPIC30F5015) .............. 65
Register Map (Bits 15-8 for dsPIC30F5016) .............. 65
Register Map (Bits 7-0 for dsPIC30F5015) ................ 65
Register Map (Bits 7-0 for dsPIC30F5016) ................ 65
File Register Instructions ........................................... 37
Fundamental Modes Supported ................................ 37
MAC Instructions ....................................................... 38
MCU Instructions ....................................................... 37
Move and Accumulator Instructions ........................... 38
Other Instructions ...................................................... 38
Overview .................................................................. 166
Summary ................................................................. 163
Controller
External Requests ..................................................... 47
Interrupt Stack Frame ................................................ 47
Priority ....................................................................... 44
Sequence .................................................................. 47
Baud Rate Generator .............................................. 113
Clock Arbitration ...................................................... 114
Multi-Master Communication, Bus Collision and
Reception ................................................................ 113
Register Map for dsPIC30F5015 ....................... 48
Register Map for dsPIC30F5016 ....................... 49
Bus Arbitration ................................................. 114
IDLE
) ........................................................... 179
© 2008 Microchip Technology Inc.

Related parts for DSPIC30F5015-30I/PT