MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 197
![MCU 8BIT 16K FLASH 48-QFN](/photos/37/62/376240/qfn-48_sml.jpg)
MC9S08JM16CGT
Manufacturer Part Number
MC9S08JM16CGT
Description
MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.DEMO9S08JM16.pdf
(386 pages)
Specifications of MC9S08JM16CGT
Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
MC9S08JM16CGT
Manufacturer:
PIXART
Quantity:
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Part Number:
MC9S08JM16CGT
Manufacturer:
FREESCALE
Quantity:
20 000
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Freescale Semiconductor
2. Then, FBE must transition either directly to PBE mode or first through BLPE mode and then to
3. Last, PBE mode transitions into PEE mode:
d) Loop until IREFST (bit 4) in MCGSC is 0, indicating the external reference is the current
e) Loop until CLKST (bits 3 and 2) in MCGSC are %10, indicating that the external reference
PBE mode:
a) BLPE: If a transition through BLPE mode is desired, first set LP (bit 3) in MCGC2 to 1.
b) BLPE/PBE: MCGC1 = 0x90 (%10010000)
c) BLPE/PBE: MCGC3 = 0x44 (%01000100)
d) BLPE: If transitioning through BLPE mode, clear LP (bit 3) in MCGC2 to 0 here to switch to
e) PBE: Loop until PLLST (bit 5) in MCGSC is set, indicating that the current source for the
f) PBE: Then loop until LOCK (bit 6) in MCGSC is set, indicating that the PLL has acquired lock
a) MCGC1 = 0x10 (%00010000)
b) Now, With an RDIV of divide-by-4, a BDIV of divide-by-1, and a VDIV of multiply-by-16,
– CLKS (bits 7 and 6) set to %10 in order to select external reference clock as system clock
– RDIV (bits 5-3) set to %111, or divide-by-128 because 4 MHz / 128 = 31.25 kHz which is
– IREFS (bit 2) cleared to 0, selecting the external reference clock
source for the reference clock
clock is selected to feed MCGOUT
– RDIV (bits 5-3) set to %010, or divide-by-4 because 4 MHz / 4 = 1 MHz which is in the 1
– PLLS (bit 6) set to 1, selects the PLL. In BLPE mode, changing this bit only prepares the
– VDIV (bits 3-0) set to %0100, or multiply-by-16 because 1 MHz reference × 16 = 16 MHz.
PBE mode
PLLS clock is the PLL
– CLKS (bits7 and 6) in MCGSC1 set to %00 in order to select the output of the PLL as the
– Loop until CLKST (bits 3 and 2) in MCGSC are %11, indicating that the PLL output is
MCGOUT = [(4 MHz / 4) × 16] / 1 = 16 MHz, and the bus frequency is MCGOUT / 2, or 8
MHz
source
in the 31.25 kHz to 39.0625 kHz range required by the FLL
MHz to 2 MHz range required by the PLL. In BLPE mode, the configuration of the RDIV
does not matter because both the FLL and PLL are disabled. Changing them only sets up the
the dividers for PLL usage in PBE mode
MCG for PLL usage in PBE mode
In BLPE mode, the configuration of the VDIV bits does not matter because the PLL is
disabled. Changing them only sets up the multiply value for PLL usage in PBE mode
system clock source
selected to feed MCGOUT in the current clock mode
MC9S08JM16 Series Data Sheet, Rev. 2
Multi-Purpose Clock Generator (S08MCGV1)
197
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