MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 316
![MCU 8BIT 16K FLASH 48-QFN](/photos/37/62/376240/qfn-48_sml.jpg)
MC9S08JM16CGT
Manufacturer Part Number
MC9S08JM16CGT
Description
MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.DEMO9S08JM16.pdf
(386 pages)
Specifications of MC9S08JM16CGT
Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
MC9S08JM16CGT
Manufacturer:
PIXART
Quantity:
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Part Number:
MC9S08JM16CGT
Manufacturer:
FREESCALE
Quantity:
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Universal Serial Bus Device Controller (S08USBV1)
17.4.2
To efficiently manage USB endpoint communications, the USB module implements a buffer descriptor
table (BDT) comprised of buffer descriptors (BD) in the local USB RAM. The BD entries provide status
or control information for a corresponding endpoint. The BD entries also provide an address to the
endpoint’s buffer. A single BD for an endpoint direction requires 3-bytes. A detailed description of the
BDT format is provided in the next sections.
The software API intelligently manages buffers for the USB module by updating the BDT when needed.
This allows the USB module to efficiently handle data transmission and reception, while the
microcontroller performs communication overhead processing and other function dependent applications.
Because the buffers are shared between the microcontroller and the USB module, a simple semaphore
mechanism is used to distinguish who is allowed to update the BDT and buffers in buffer memory. A
semaphore bit, the OWN bit, is cleared to 0 when the BD entry is owned by the microcontroller. The
microcontroller is allowed read and write access to the BD entry and the data buffer when the OWN bit is
0. When the OWN bit is set to 1, the BD entry and the data buffer are owned by the USB module. The USB
module now has full read and write access and the microcontroller must not modify the BD or its
corresponding data buffer.
17.4.2.1
Every endpoint direction requires at least one three-byte Buffer Descriptor entry. Thus, endpoint 0, a
bidirectional control endpoint, requires one BDT entry for the IN direction, and one for the OUT direction.
Using two BD entries also allows for double-buffering. Double-buffering BDs allows the USB module to
easily transfer data at the maximum throughput provided by the USB module. Double buffering allows the
MCU to process one BD while the USB module is processing the other BD.
To facilitate double-buffering, two buffer descriptor (BD) entries are needed for each endpoint direction.
One BD entry is the EVEN BD and the other is the ODD BD.
17.4.2.2
The BDT addressing is hardwired into the module. The BDT occupies the first portion of the USB RAM.
To access endpoint data via the USB or MCU, the addressing mechanism of the buffer descriptor table
must be understood.
All enabled IN and OUT endpoint BD entries are indexed into the BDT to allow easy access via the USB
module or the MCU. The figure below shows the USB RAM organization. The figure shows that the first
entries in the USB RAM are dedicated to storage of the BDT entries - i.e. the first 30 bytes of the USB
RAM (0x00 to 0x1D) are used to implement the BDT.
316
Buffer Descriptor Table (BDT)
Multiple Buffer Descriptor Table Entries for a Single Endpoint
Addressing Buffer Descriptor Table Entries
MC9S08JM16 Series Data Sheet, Rev. 2
Freescale Semiconductor
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