MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 197
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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In this particular case, the MCU has been attached to a PCB and the entire assembly is undergoing final
test with automated test equipment. A separate signal or message is provided to the MCU operating under
user provided software control. The MCU initiates a trim procedure as outlined in
tester supplies a precision reference signal.
If the intended bus frequency is near the maximum allowed for the device, it is recommended to trim using
a reference divider value (RDIV setting) of twice the final value. After the trim procedure is complete, the
reference divider can be restored. This will prevent accidental overshoot of the maximum clock frequency.
Freescale Semiconductor
Initial conditions:
1) Clock supplied from ATE has 500 μsec duty period
2) MCG configured for internal reference with 8MHz bus
INCREASES THE FREQUENCY)
(DECREASING TRMVAL
TRMVAL - 256/ (2**n)
COUNT < EXPECTED = 500
(RUNNING TOO SLOW)
TRMVAL =
n = n + 1
MC9S08DZ128 Series Data Sheet, Rev. 1
IS n > 9?
(COUNT = # OF BUS CLOCKS / 8)
DECREASES THE FREQUENCY)
NO
Figure 8-13. Trim Procedure
START TRIM PROCEDURE
INCOMING CLOCK WIDTH
(INCREASING TRMVAL
TRMVAL + 256/ (2**n)
TRMVAL = $100
CASE STATEMENT
TRMVAL =
MEASURE
YES
n=1
.
COUNT > EXPECTED = 500
(RUNNING TOO FAST)
COUNT = EXPECTED = 500
Chapter 8 Multi-Purpose Clock Generator (S08MCGV2)
Figure 8-13
NON-VOLATILE MEMORY
STORE MCGTRM AND
FTRIM VALUES IN
CONTINUE
while the
197
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