MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 64
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 4 Memory
4.4.3.3
This register is one of three data registers that the user can use to access any FLASH memory location in
the extended address map. When LWP is accessed the contents of LAP2:LAP0 make up the extended
address of the FLASH memory location to be addressed. When accessing data using LWP, the contents of
LAP2:LAP0 will increment after the read or write is complete.
Accessing LWP does the same thing as accessing LBP. The MMU register ordering of LWP followed by
LBP, allow the user to access data by words using the LDHX or STHX instructions of the LWP register.
4.4.3.4
This register is one of three data registers that the user can use to access any FLASH memory location in
the extended address map. When LBP is accessed the contents of LAP2:LAP0 make up the extended
64
LA16:LA0
D7:D0
Field
Field
16:0
7:0
Reset:
Reset:
W
W
W
W
R
R
R
R
The values in LAP2:LAP0 are used to create a 17-bit linear address pointer. The value in these registers are used
as the extended address when accessing any of the data registers LB, LBP and LWP.
Reads of this register will first return the data value pointed to by the linear address pointer, LAP2:LAP0 and then
will increment LAP2:LAP0. Writes to this register will first write the data value to the memory location specified
by the linear address pointer and then will increment LAP2:LAP0. Writes to this register are most commonly used
when writing to the FLASH block(s) during programming.
Linear Word Post Increment Register (LWP)
Linear Byte Post Increment Register (LBP)
LA15
LA7
D7
0
0
0
7
7
Table 4-7. Linear Address Pointer Registers 2:0 Field Descriptions
Table 4-8. Linear Word Post Increment Register Field Descriptions
Figure 4-6. Linear Address Pointer Registers 2:0 (LAP2:LAP0)
Figure 4-7. Linear Word Post Increment Register (LWP)
LA14
LA6
D6
0
0
0
6
6
MC9S08DZ128 Series Data Sheet, Rev. 1
LA13
LA5
D5
5
0
0
5
0
LA12
LA4
D4
0
0
0
4
4
Description
Description
LA11
LA3
D3
0
0
0
3
3
LA10
LA2
D2
0
0
0
2
2
LA9
LA1
D1
0
0
0
1
1
Freescale Semiconductor
LA16
LA8
LA0
D0
0
0
0
0
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