MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 272
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
Read: Anytime
Write: Anytime; write of ‘1’ clears flag; write of ‘0’ ignored
12.3.13 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and
INITAK = 1)
Write: Unimplemented
272
BOHOLD
Field
0
Reset:
Reset:
W
W
R
R
Bus-off State Hold Until User Request — If BORM is set in
(CANCTL1),
recovery from bus-off. Refer to
0 Module is not bus-off or recovery has been requested by user in bus-off state
1 Module is bus-off and holds this state until user request
RXERR7
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
0
0
0
7
7
this bit indicates whether the module has entered the bus-off state. Clearing this bit requests the
Figure 12-17. MSCAN Receive Error Counter (CANRXERR)
Figure 12-16. MSCAN Miscellaneous Register (CANMISC)
RXERR6
= Unimplemented
= Unimplemented
Table 12-19. CANMISC Register Field Descriptions
6
0
0
6
0
MC9S08DZ128 Series Data Sheet, Rev. 1
RXERR5
Section 12.6.2, “Bus-Off
0
0
0
5
5
RXERR4
NOTE
4
0
0
4
0
Description
Recovery,” for details.
RXERR3
0
0
0
3
Section 12.3.2, “MSCAN Control Register 1
3
RXERR2
2
0
0
2
0
RXERR1
Freescale Semiconductor
0
0
0
1
1
BOHOLD
RXERR0
0
0
0
0
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