MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 311
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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13.1.3
As shown in
prescale bits (SPPR2:SPPR1:SPPR0) choose a prescale divisor of 1, 2, 3, 4, 5, 6, 7, or 8. The three rate
select bits (SPR2:SPR1:SPR0) divide the output of the prescaler stage by 2, 4, 8, 16, 32, 64, 128, or 256
to get the internal SPI master mode bit-rate clock.
Freescale Semiconductor
BUS RATE
CLOCK
SPI SYSTEM
ENABLE
LSBFE
MSTR
SPE
SPI Baud Rate Generation
CLOCK GENERATOR
Figure
SPIBR
MASTER/SLAVE
MODE SELECT
13-4, the clock source for the SPI baud rate generator is the bus clock. The three
SHIFT
OUT
SHIFT
DIRECTION
Tx BUFFER (WRITE SPIxD)
Rx BUFFER (READ SPIxD)
MODE FAULT
DETECTION
SPI SHIFT REGISTER
CLOCK
CLOCK
LOGIC
Figure 13-3. SPI Module Block Diagram
SHIFT
MC9S08DZ128 Series Data Sheet, Rev. 1
MODF
Rx BUFFER
SPRF
FULL
Tx BUFFER
EMPTY
SHIFT
SPTEF
SPTIE
SPIE
IN
MASTER CLOCK
SLAVE CLOCK
BIDIROE
MODFEN
SPC0
SSOE
Chapter 13 Serial Peripheral Interface (S08SPIV3)
PIN CONTROL
M
S
M
S
M
S
MASTER/
SLAVE
SPI
INTERRUPT
REQUEST
MOSI
(MOMI)
MISO
(SISO)
SPSCK
SS
311
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