M37542F8FP#W4 Renesas Electronics America, M37542F8FP#W4 Datasheet - Page 46

IC 740 MCU FLASH 32K 36-SSOP

M37542F8FP#W4

Manufacturer Part Number
M37542F8FP#W4
Description
IC 740 MCU FLASH 32K 36-SSOP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M37542F8FP#W4

Core Processor
740
Core Size
8-Bit
Speed
8MHz
Connectivity
SIO, UART/USART
Peripherals
POR, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
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MIT
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Part Number:
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7542 Group
Fig. 49 Structure of capture software trigger register
Rev.3.03
REJ03B0006-0303
b 7
b 7
b7
b 7
Jul 11, 2008
b 0
b 0
b0
b 0
C a p t u r e r e g i s t e r 0 ( L o w - o r d e r )
( C A P 0 L : a d d r e s s 0 0 0 C
C a p t u r e r e g i s t e r 0 ( H i g h - o r d e r )
( C A P 0 H : a d d r e s s 0 0 0 D
C a p t u r e r e g i s t e r 1 ( L o w - o r d e r )
( C A P 1 L : a d d r e s s 0 0 0 E
C a p t u r e r e g i s t e r 1 ( H i g h - o r d e r )
( C A P 1 H : a d d r e s s 0 0 0 F
Page 44 of 117
1 6
1 6
1 6
1 6
)
)
)
)
Fig. 50 Structure of capture software trigger register/capture
mode register
b 7
b 7
b 0
b 0
C a p t u r e s o f t w a r e t r i g g e r r e g i s t e r
( C S T R : a d d r e s s 0 0 1 3
C a p t u r e m o d e r e g i s t e r
( C A P M : a d d r e s s 0 0 2 0
C a p t u r e 0 i n t e r r u p t e d g e s e l e c t i o n b i t s
C a p t u r e 1 i n t e r r u p t e d g e s e l e c t i o n b i t s
C a p t u r e 0 n o i s e f i l t e r c l o c k s e l e c t i o n b i t s
C a p t u r e 1 n o i s e f i l t e r c l o c k s e l e c t i o n b i t s
C a p t u r e l a t c h 0 0 s o f t w a r e t r i g g e r b i t
C a p t u r e l a t c h 0 1 s o f t w a r e t r i g g e r b i t
C a p t u r e l a t c h 1 0 s o f t w a r e t r i g g e r b i t
C a p t u r e l a t c h 1 1 s o f t w a r e t r i g g e r b i t
E a c h so f t w a r e t r i g g e r o c c u r s b y s e t t i n g “ 1 ” t o
c o r r e s p o n d i n g b i t . ( r e t u r n s “ 0 ” w h e n r e a d )
N o t u s e d ( r e t u r n s “ 0 ” w h e n r e a d )
b 1 b 0
b 3 b 2
b 5 b 4
b 7 b 6
0 0 : R i s i n g a n d f a l l i n g e d g e
0 1 : R i s i n g e d g e
1 0 : F a l l i n g e d g e
1 1 : N o t a v a i l a b l e
0 0 : R i s i n g a n d f a l l i n g e d g e
0 1 : R i s i n g e d g e
1 0 : F a l l i n g e d g e
1 1 : N o t a v a i l a b l e
0 0 : F i l t e r s t o p
0 1 : f ( X
1 0 : f ( X
1 1 : f ( X
0 0 : F i l t e r s t o p
0 1 : f ( X
1 0 : f ( X
1 1 : f ( X
I N
I N
I N
I N
I N
I N
)
) / 8
) / 3 2
)
) / 8
) / 3 2
1 6
1 6
, i n i t i a l v a l u e : 0 0
, i n i t i a l v a l u e : 0 0
1 6
1 6
)
)

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