HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 188

• Manufacturer Part Number: HD64F3672FPIV
• Description: MCU 3/5V 16K I-TEMP PB-FREE 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3672FPIV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 12 Watchdog Timer
12.3
The watchdog timer is provided with an 8-bit counter. If 1 is written to WDON while writing 0 to
B2WI when the TCSRWE bit in TCSRWD is set to 1, TCWD begins counting up. (To operate the
watchdog timer, two write accesses to TCSRWD are required.) When a clock pulse is input after
the TCWD count value has reached H'FF, the watchdog timer overflows and an internal reset
signal is generated. The internal reset signal is output for a period of 256
is a writable counter, and when a value is set in TCWD, the count-up starts from that value. An
overflow period in the range of 1 to 256 input clock cycles can therefore be set, according to the
TCWD set value.
Figure 12.2 shows an example of watchdog timer operation.
Rev.4.00 Nov. 02, 2005 Page 162 of 304
REJ09B0143-0400
Example:
Operation
Internal reset
signal
count value
TCWD
With 30ms overflow period when
Therefore, 256 – 15 = 241 (H'F1) is set in TCW.
H'FF
H'00
4
8192
10
H'F1
Figure 12.2 Watchdog Timer Operation Example
6
H'F1 written
to TCWD
30
10
–3
Start
= 14.6
H'F1 written to TCWD
= 4 MHz
256
Reset generated
osc
TCWD overflow
clock cycles
osc
clock cycles. TCWD