HD64F3672FPIV Renesas Electronics America, HD64F3672FPIV Datasheet - Page 56

MCU 3/5V 16K I-TEMP PB-FREE 64-L

HD64F3672FPIV

Manufacturer Part Number
HD64F3672FPIV
Description
MCU 3/5V 16K I-TEMP PB-FREE 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet

Specifications of HD64F3672FPIV

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 2 CPU
2.5.2
Table 2.12 indicates how effective addresses are calculated in each addressing mode. In this LSI
the upper 8 bits of the effective address are ignored in order to generate a 16-bit effective address.
Table 2.12 Effective Address Calculation (1)
Rev.4.00 Nov. 02, 2005 Page 30 of 304
REJ09B0143-0400
Register indirect with post-increment or
pre-decrement
•Register indirect with post-increment @ERn+
•Register indirect with pre-decrement @-ERn
Register direct(Rn)
Register indirect(@ERn)
Addressing Mode and Instruction Format
Effective Address Calculation
Figure 2.8 Branch Address Specification in Memory Indirect Mode
Specified
by @aa:8
The value to be added or subtracted is 1 when the
operand is byte size, 2 for word size, and 4 for
longword size.
Sign extension
Effective Address Calculation
General register contents
General register contents
General register contents
General register contents
Branch address
Dummy
1, 2, or 4
1, 2, or 4
Operand is general register contents.
Effective Address (EA)

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