HD6413008VX25 Renesas Electronics America, HD6413008VX25 Datasheet - Page 19

MCU 5V 0K 100-TQFP

HD6413008VX25

Manufacturer Part Number
HD6413008VX25
Description
MCU 5V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413008VX25

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6413008VTE25
HD6413008VTE25
Section 1 Overview
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview...........................................................................................................................
Block Diagram ..................................................................................................................
Pin Description..................................................................................................................
1.3.1
1.3.2
1.3.3
Overview........................................................................................................................... 17
2.1.1
2.1.2
CPU Operating Modes ...................................................................................................... 18
Address Space ................................................................................................................... 19
Register Configuration ...................................................................................................... 20
2.4.1
2.4.2
2.4.3
2.4.4
Data Formats ..................................................................................................................... 24
2.5.1
2.5.2
Instruction Set ................................................................................................................... 27
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
Addressing Modes and Effective Address Calculation ..................................................... 41
2.7.1
2.7.2
Processing States............................................................................................................... 47
2.8.1
2.8.2
2.8.3
2.8.4
2.8.5
2.8.6
Pin Arrangement ..................................................................................................
Pin Functions .......................................................................................................
Pin Assignments in Each Mode ........................................................................... 12
Features................................................................................................................ 17
Differences from H8/300 CPU............................................................................. 18
Overview.............................................................................................................. 20
General Registers ................................................................................................. 21
Control Registers ................................................................................................. 22
Initial CPU Register Values ................................................................................. 23
General Register Data Formats ............................................................................ 24
Memory Data Formats ......................................................................................... 25
Instruction Set Overview ..................................................................................... 27
Instructions and Addressing Modes ..................................................................... 28
Tables of Instructions Classified by Function...................................................... 29
Basic Instruction Formats .................................................................................... 38
Notes on Use of Bit Manipulation Instructions.................................................... 39
Addressing Modes ............................................................................................... 41
Effective Address Calculation.............................................................................. 43
Overview.............................................................................................................. 47
Program Execution State...................................................................................... 47
Exception-Handling State .................................................................................... 48
Exception Handling Operation............................................................................. 49
Bus-Released State............................................................................................... 50
Reset State............................................................................................................ 50
...................................................................................................................... 17
.............................................................................................................
Contents
Rev.4.00 Aug. 20, 2007, Page xvii of xliv
REJ09B0395-0400
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