HD6413008VX25 Renesas Electronics America, HD6413008VX25 Datasheet - Page 41

• Manufacturer Part Number: HD6413008VX25
• Description: MCU 5V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413008VX25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 35
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6413008VTE25; HD6413008VTE25

Section 1 Overview
Table 1.1
Table 1.2
Table 1.3
Table 1.4
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.13
Table 2.14
Section 3 MCU Operating Modes
Table 3.1
Table 3.2
Table 3.3
Section 4 Exception Handling
Table 4.1
Table 4.2
Section 5 Interrupt Controller
Table 5.1
Table 5.2
Table 5.3
Table 5.4
Table 5.5
Features ..............................................................................................................
Comparison of H8/3008 Pin Arrangements .......................................................
Pin Functions......................................................................................................
Pin Assignments in Each Mode (FP-100B, TFP-100B) ..................................... 12
Instruction Classification.................................................................................... 27
Instructions and Addressing Modes ................................................................... 28
Data Transfer Instructions .................................................................................. 30
Arithmetic Operation Instructions ...................................................................... 31
Logic Operation Instructions .............................................................................. 33
Shift Instructions ................................................................................................ 33
Bit Manipulation Instructions............................................................................. 34
Branching Instructions........................................................................................ 36
System Control Instructions ............................................................................... 37
Block Transfer Instruction.................................................................................. 38
Addressing Modes.............................................................................................. 41
Absolute Address Access Ranges....................................................................... 42
Effective Address Calculation ............................................................................ 44
Exception Handling Types and Priority ............................................................. 48
Operating Mode Selection .................................................................................. 55
Registers ............................................................................................................. 56
Pin Functions in Each Mode............................................................................... 61
Exception Types and Priority ............................................................................. 65
Exception Vector Table...................................................................................... 67
Interrupt Pins ...................................................................................................... 77
Interrupt Controller Registers............................................................................. 77
Interrupt Sources, Vector Addresses, and Priority ............................................. 89
UE, I, and UI Bit Settings and Interrupt Handling ............................................. 92
Interrupt Response Time .................................................................................... 98
Tables
Rev.4.00 Aug. 20, 2007, Page xxxix of xliv
REJ09B0395-0400
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