DF36034HJV Renesas Electronics America, DF36034HJV Datasheet - Page 222
![MCU 3/5V 32K J-TEMP PB-FREE 64-Q](/photos/28/61/286103/64-bqfp__prqp0064gb-a_sml.jpg)
DF36034HJV
Manufacturer Part Number
DF36034HJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of DF36034HJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 12 Timer Z
Free-Running Count Operation and Periodic Count Operation: Immediately after a reset, the
TCNT counters for channels 0 and 1 are all designated as free-running counters. When the
relevant bit in TSTR is set to 1, the corresponding TCNT counter starts an increment operation as
a free-running counter. When TCNT overflows, the OVF flag in TSR is set to 1. If the value of the
OVIE bit in the corresponding TIER is 1 at this point, timer Z requests an interrupt. After
overflow, TCNT starts an increment operation again from H'0000.
Figure 12.8 illustrates free-running counter operation.
When compare match is selected as the TCNT clearing source, the TCNT counter for the relevant
channel performs periodic count operation. The GR registers for setting the period are designated
as output compare registers, and counter clearing by compare match is selected by means of bits
CCLR1 and CCLR0 in TCR. After the settings have been made, TCNT starts an increment
operation as a periodic counter when the corresponding bit in TSTR is set to 1. When the count
value matches the value in GR, the IMFA, IMFB, IMFC, or IMFD flag in TSR is set to 1 and
TCNT is cleared to H'0000.
If the value of the corresponding IMIEA, IMIEB, IMIEC, or IMIED bit in TIER is 1 at this point,
the timer Z requests an interrupt. After a compare match, TCNT starts an increment operation
again from H'0000.
Rev. 4.00 Mar. 15, 2006 Page 188 of 556
REJ09B0026-0400
H'FFFF
H'0000
STR0,
STR1
OVF
TCNT value
Figure 12.8 Free-Running Counter Operation
Time
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