DF36034HJV Renesas Electronics America, DF36034HJV Datasheet - Page 32
![MCU 3/5V 32K J-TEMP PB-FREE 64-Q](/photos/28/61/286103/64-bqfp__prqp0064gb-a_sml.jpg)
DF36034HJV
Manufacturer Part Number
DF36034HJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of DF36034HJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Table 7.3
Table 7.4
Table 7.5
Table 7.6
Table 7.7
Section 10 Timer B1
Table 10.1
Table 10.2
Section 11 Timer V
Table 11.1
Table 11.2
Section 12 Timer Z
Table 12.1
Table 12.2
Table 12.3
Table 12.4
Table 12.5
Table 12.6
Table 12.7
Table 12.8
Section 14 Serial Communication Interface 3 (SCI3)
Table 14.1
Table 14.2
Table 14.3
Table 14.3
Table 14.3
Table 14.4
Table 14.5
Table 14.5
Table 14.6
Table 14.7
Section 15 Controller Area Network for Tiny (TinyCAN)
Table 15.1
Table 15.2
Table 15.3
Rev. 4.00 Mar. 15, 2006 Page xxx of xxxii
System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is
Possible................................................................................................................... 98
Reprogram Data Computation Table .................................................................... 102
Additional-Program Data Computation Table ...................................................... 102
Programming Time ............................................................................................... 102
Flash Memory Operating States............................................................................ 107
Pin Configuration.................................................................................................. 144
Timer B1 Operating Modes .................................................................................. 148
Pin Configuration.................................................................................................. 151
Clock Signals to Input to TCNTV and Counting Conditions ............................... 153
Timer Z Functions ................................................................................................ 164
Pin Configuration.................................................................................................. 168
Initial Output Level of FTIOB0 Pin...................................................................... 200
Output Pins in Reset Synchronous PWM Mode................................................... 206
Register Settings in Reset Synchronous PWM Mode........................................... 206
Output Pins in Complementary PWM Mode........................................................ 210
Register Settings in Complementary PWM Mode................................................ 211
Register Combinations in Buffer Operation ......................................................... 221
Channel Configuration.......................................................................................... 252
Pin Configuration.................................................................................................. 254
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (1) ...... 262
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (2) ...... 264
Examples of BRR Settings for Various Bit Rates (Asynchronous Mode) (3) ...... 266
Maximum Bit Rate for Each Frequency (Asynchronous Mode) .......................... 267
Examples of BRR Settings for Various Bit Rates
(Clocked Synchronous Mode) (1)......................................................................... 268
Examples of BRR Settings for Various Bit Rates
(Clocked Synchronous Mode) (2)......................................................................... 269
SSR Status Flags and Receive Data Handling ...................................................... 275
SCI3 Interrupt Requests........................................................................................ 291
Pin Configuration.................................................................................................. 297
Settable Values in BCR ........................................................................................ 325
Settable Values for TSG1 and TSG2 in BCR1 ..................................................... 326
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