DF36034HJV Renesas Electronics America, DF36034HJV Datasheet - Page 521

MCU 3/5V 32K J-TEMP PB-FREE 64-Q

DF36034HJV

Manufacturer Part Number
DF36034HJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of DF36034HJV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
A.1
Condition Code
Symbol
Rd
Rs
Rn
ERd
ERs
ERn
(EAd)
(EAs)
PC
SP
CCR
N
Z
V
C
disp
+
÷
¬
Instruction List
Description
General destination register
General source register
General register
General destination register (address register or 32-bit register)
General source register (address register or 32-bit register)
General register (32-bit register)
Destination operand
Source operand
Program counter
Stack pointer
Condition-code register
N (negative) flag in CCR
Z (zero) flag in CCR
V (overflow) flag in CCR
C (carry) flag in CCR
Displacement
Transfer from the operand on the left to the operand on the right, or transition from
the state on the left to the state on the right
Addition of the operands on both sides
Subtraction of the operand on the right from the operand on the left
Multiplication of the operands on both sides
Division of the operand on the left by the operand on the right
Logical AND of the operands on both sides
Logical OR of the operands on both sides
Logical exclusive OR of the operands on both sides
NOT (logical complement)
Appendix A Instruction Set
Rev. 4.00 Mar. 15, 2006 Page 487 of 556
REJ09B0026-0400
Appendix

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