DF36034HJV Renesas Electronics America, DF36034HJV Datasheet - Page 243
![MCU 3/5V 32K J-TEMP PB-FREE 64-Q](/photos/28/61/286103/64-bqfp__prqp0064gb-a_sml.jpg)
DF36034HJV
Manufacturer Part Number
DF36034HJV
Description
MCU 3/5V 32K J-TEMP PB-FREE 64-Q
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Specifications of DF36034HJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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In reset synchronous PWM mode, TCNT_0 and TCNT_1 perform increment and independent
operations, respectively. However, GRA_1 and GRB_1 are separated from TCNT_1. When a
compare match occurs between TCNT_0 and GRA_0, a counter is cleared and an increment
operation is restarted from H'0000.
The PWM pin outputs 0 or 1 whenever a compare match between GRB_0, GRA_1, GRB_1 and
TCNT_0 or counter clearing occur.
For details on operations when reset synchronous PWM mode and buffer operation are
simultaneously set, refer to section 12.4.8, Buffer Operation.
Figure 12.28 Example of Reset Synchronous PWM Mode Operation (OLS0 = OLS1 = 0)
GRA_0
GRB_0
GRA_1
GRB_1
H'0000
FTIOB0
FTIOD0
FTIOA1
FTIOC1
FTIOB1
FTIOD1
FTIOC0
TCNT value
Counter cleared by GRA compare match
Rev. 4.00 Mar. 15, 2006 Page 209 of 556
Section 12 Timer Z
REJ09B0026-0400
Time
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