DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 244
![MCU 3/5V 56K PB-FREE J-TEMP 64-L](/photos/28/61/286100/64-lqfp__plqp0064kb-a_sml.jpg)
DF36037FZJV
Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36057GFZV.pdf
(594 pages)
Specifications of DF36037FZJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 12 Timer Z
12.4.7
Three PWM waveforms for non-overlapped normal and counter phases are output by combining
channels 0 and 1.
In complementary PWM mode, the FTIOB0 to FTIOD0 and FTIOA1 to FTIOD1 pins become
PWM-output pins automatically. TCNT_0 and TCNT_1 perform an increment or decrement
operation. Tables 12.6 and 12.7 show the output pins and register settings in complementary PWM
mode, respectively.
Figure 12.29 shows the example of complementary PWM mode setting procedure.
Table 12.6 Output Pins in Complementary PWM Mode
Rev. 4.00 Mar. 15, 2006 Page 210 of 556
REJ09B0026-0400
Channel
0
0
0
1
1
1
1
Complementary PWM Mode
Pin Name
FTIOC0
FTIOB0
FTIOD0
FTIOA1
FTIOC1
FTIOB1
FTIOD1
I/O
Output
Output
Output
Output
Output
Output
Output
Toggle output in synchronous with PWM cycle
PWM output 1
PWM output 1 (counter-phase waveform non-overlapped
PWM output 2
PWM output 2 (counter-phase waveform non-overlapped
PWM output 3
PWM output 3 (counter-phase waveform non-overlapped
Pin Function
with PWM output 1)
with PWM output 2)
with PWM output 3)
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