DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 416

• Manufacturer Part Number: DF36037FZJV
• Description: MCU 3/5V 56K PB-FREE J-TEMP 64-L
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of DF36037FZJV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SSU
• Peripherals: PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 17 Subsystem Timer (Subtimer)
17.2.2
SBTDCNT is an 8-bit readable/writable down counter. When SBTDCNT underflows, an interrupt
request is issued and the SBTUF flag in SBTCTL is set to 1. SBTDCNT is initialized to H'FF.
17.2.3
ROPCR is an 8-bit readable/writable register. When the OSCEB bit in SBTCTL is set to 1,
SBTPS counts two system clock cycles from the first falling edge of the on-chip oscillator to the
third falling edge and then transfers the count value to ROPCR. After that, ROPCR configures the
division ratio of subclock. ROPCR is initialized to H'FF.
Rev. 4.00 Mar. 15, 2006 Page 382 of 556
REJ09B0026-0400
Bit
2
1
0
Bit Name
SYSCKS
SBTIB
SBTUF
Subtimer Counter (SBTDCNT)
Ring Oscillator Prescaler Setting Register (ROPCR)
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Subclock Supply Enable
Enables or disables clock supply to the entire chip when
the on-chip oscillator for the subtimer is used.
0: Clock supply is disabled.
1: Clock supply is enabled.
Subtimer Interrupt Request Enable
When this bit is set to 1, an interrupt request caused by
the SBTUF flag is enabled.
Underflow Interrupt Flag
[Setting condition]
When the SBTDCNT value underflows
[Clearing condition]
When 0 is written to this bit after reading 1