DF36037FZJV Renesas Electronics America, DF36037FZJV Datasheet - Page 442
![MCU 3/5V 56K PB-FREE J-TEMP 64-L](/photos/28/61/286100/64-lqfp__plqp0064kb-a_sml.jpg)
DF36037FZJV
Manufacturer Part Number
DF36037FZJV
Description
MCU 3/5V 56K PB-FREE J-TEMP 64-L
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheet
1.DF36057GFZV.pdf
(594 pages)
Specifications of DF36037FZJV
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SSU
Peripherals
PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 442 of 594
- Download datasheet (4Mb)
Section 19 Power-On Reset and Low-Voltage Detection Circuits (Optional)
19.3
19.3.1
Figure 19.2 shows the timing of the operation of the power-on reset circuit. As the power-supply
voltage rises, the capacitor which is externally connected to the RES pin is gradually charged via
the on-chip pull-up resistor (typ. 150 k ). Since the state of the RES pin is transmitted within the
chip, the prescaler S and the entire chip are in their reset states. When the level on the RES pin
reaches the specified value, the prescaler S is released from its reset state and it starts counting.
The OVF signal is generated to release the internal reset signal after the prescaler S has counted
131,072 clock ( ) cycles. The noise canceler of approximately 500 ns is incorporated to prevent
the incorrect operation of the chip by noise on the RES pin.
To achieve stable operation of this LSI, the power supply needs to rise to its full level and settles
within the specified time. The maximum time required for the power supply to rise and settle after
power has been supplied (t
which is connected to RES pin (C
supply voltage, the power supply circuit should be designed to satisfy the following formula.
Note that the power supply voltage (Vcc) must fall below Vpor = 100 mV and rise after charge on
the RES pin is removed. To remove charge on the RES pin, it is recommended that the diode
should be placed near Vcc. If the power supply voltage (Vcc) rises from the point above Vpor, a
power-on reset may not occur.
Rev. 4.00 Mar. 15, 2006 Page 408 of 556
REJ09B0026-0400
t
PWON
Operation
Power-On Reset Circuit
(t
(ms)
PWON
90
3000 ms, C
C
PWON
RES
) is determined by the oscillation frequency (f
( F)
RES
RES
). If t
162/f
0.22 F, and f
PWON
OSC
(MHz)
means the time required to reach 90
OSC
= 10 in 2-MHz to 10-MHz operation)
OSC
) and capacitance
of power
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