HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 340

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 I/O Ports
Pin
PA
TCLKB/
TEND
PA
TCLKA/
TEND
Rev. 4.00 Jan 26, 2006 page 316 of 938
REJ09B0276-0400
1
0
/TP
/TP
1
0
1
0
/
/
Pin Functions and Selection Method
Bit MDF in TMDR, bits TPSC2 to TPSC0 in TCR2 to TCR0 of the 16-bit timer, bits CKS2 to CKS0 in TCR2 of
the 8-bit timer, bit NDER1 in NDERA, and bit PA
PA
NDER1
Pin function
Notes:
8-bit timer channel 1
settings
CKS2
CKS1
CKS0
Bit MDF in TMDR, bits TPSC2 to TPSC0 in TCR2 to TCR0 of the 16-bit timer, bits CKS2 to CKS0 in TCR0 of
the 8-bit timer, bit NDER0 in NDERA, and bit PA
PA
NDER0
Pin function
Notes:
8-bit timer channel 0
settings
CKS2
CKS1
CKS0
1
0
DDR
DDR
1.
2.
1.
2.
TCLKB input when MDF = 1 in TMDR, or TPSC2 = 1, TPSC1 = 0, and TPSC0 = 1 in any of
TCR2 to TCR0, or bits CKS2 to CKS0 in TCR2 are as shown in (1) in the table below.
When an external request is specified as a DMAC activation source, TEND
of bits PA
TCLKA input when MDF = 1 in TMDR, or TPSC2 = 1, TPSC1 = 0 and TPSC0 = 0 in any of
TCR2 to TCR0, or bits CKS2 to CKS0 in TCR0 are as shown in (1) in the table below.
When an external request is specified as a DMAC activation source, TEND
of bits PA
1
0
DDR and NDER1.
DDR and NDER0.
—
—
—
—
0
0
PA
PA
1
0
—
—
0
0
input
input
(2)
(2)
1
0
DDR select the pin function as follows.
DDR select the pin function as follows.
0
0
0
0
TEND
TEND
TCLKB input *
TCLKA input *
PA
PA
1
0
1
0
output
output
1
0
1
0
1
output *
output *
1
1
2
2
1
1
1
(1)
(1)
1
0
output regardless
output regardless
TP
TP
—
—
1
1
1
0
output
output
1
1
1