HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 663

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

18.6.2
Software protection can be implemented by setting the RAMS bit in RAM control register
(RAMCR) and erase block register (EBR). When software protection is in effect, setting the P or E
bit in flash memory control register (FLMCR) does not cause a transition to program mode or
erase mode. (See table 18.9.)
Table 18.9 Software Protection
Item
Emulation
protection *
Block
specification
protection
Notes: 1. Two modes: program-verify mode and erase-verify mode.
18.6.3
In error protection, an error is detected when this LSI runaway occurs during flash memory
programming/erasing *
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
If the LSI malfunctions during flash memory programming/erasing, the FLER bit *
flash memory status register (FLMSR) and the error protection state is entered. The FLMCR and
EBR settings *
error occurred. When 1 is set in the FLER bit, transition to the program mode or erase mode
cannot be made even by setting the P and E bits in FLMCR. However, PV and EV bit in FLMCR
setting is enabled, and a transition can be made to verify mode.
2. Programming to the RAM area that overlaps flash memory is possible.
3. All blocks become unerasable, and specification by block is impossible.
4. Set H'00 in the EBR bits, except for erase.
Software Protection
Error Protection
2
3
are retained, but program mode or erase mode is aborted at the point at which the
Description
1
Setting the RAMS bit in RAMCR sets the
program/erase-protected state for all
blocks.
Erase protection can be set for individual
blocks by settings in erase block register
(EBR). *
However, program protection is disabled.
Setting EBR to H'00 places all blocks in
the erase-protected state.
, or operation is not performed in accordance with the program/erase
4
Rev. 4.00 Jan 26, 2006 page 639 of 938
Function
Program Erase
No *
—
2
No *
No
REJ09B0276-0400
3
Section 18 ROM
2
is set to 1 in
Verify *
Yes
Yes
1