HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 662

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 18 ROM
Table 18.8 Hardware Protection
Item
FWE pin protection
Reset/standby
protection
Error protection
Notes: 1. Two modes: program-verify and erase-verify.
Rev. 4.00 Jan 26, 2006 page 638 of 938
REJ09B0276-0400
2. The RAM area that overlapped flash memory is deleted.
3. All blocks become unerasable and specification by block is impossible.
4. For more information, see section 18.9, Notes on Flash Memory Programming/Erasing.
5. See sections 4.2.2, Reset Sequence and 18.9, Notes on Flash Memory
Programming/Erasing. The H8/3067RF requires a minimum reset time during operation
of 20 system clocks.
Description
When a low level is input to the FWE pin,
FLMCR and EBR are initialized, and the
program/erase-protected state is
entered. *
In a reset (including a WDT overflow
reset) and in standby mode, FLMCR and
EBR are initialized, and the
program/erase-protected state is entered.
In a reset via the RES pin, the reset state
is not entered unless the RES pin is held
low until oscillation stabilizes after
powering on (The minimum oscillation
stabilization time is 20ms). In the case of
a reset during operation, hold the RES pin
low for at least 20 system clock cycles. *
When a microcomputer operation error
(error generation (FLER=1)) was detected
while flash memory was being
programmed/erased, error protection is
enabled. At this time, the FLMCR and
EBR settings are held, but
programming/erasing is aborted at the
time the error was generated. Error
protection is released only by a reset via
the RES pin or a WDT reset, or in the
hardware standby mode.
4
5
Function
Program Erase
No *
No
No
2
No *
No *
No *
3
3
3
Verify *
No
No
Yes
1

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