HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 442

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 10 8-Bit Timers
Input capture input
Input capture signal
TCNT
N
TCORB
N
Figure 10.13 Timing of Input Capture Input Signal
10.4.4
Timing of Status Flag Setting
Timing of CMFA/CMFB Flag Setting when Compare Match Occurs: CMFA and CMFB in
TCSR are set to 1 by the compare match signal output when the TCOR and TCNT values match.
The compare match signal is generated in the last state of the match (when the matched TCNT
count value is updated). Therefore, after the TCNT and TCOR values match, the compare match
signal is not generated until an incrementing clock pulse is generated. Figure 10.14 shows the
timing in this case.
TCNT
N
N+1
TCOR
N
Compare match signal
CMF
Figure 10.14 CMF Flag Setting Timing when Compare Match Occurs
Timing of CMFB Flag Setting when Input Capture Occurs: On generation of an input capture
signal, the CMFB flag is set to 1 and at the same time the TCNT value is transferred to TCORB.
Figure 10.15 shows the timing in this case.
Rev. 4.00 Jan 26, 2006 page 418 of 938
REJ09B0276-0400

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