UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 473

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Address: FF56H After reset: 00H R/W
Notes 1.
Caution Make sure POWER6 = 0 when rewriting TPS63 to TPS60.
Remarks 1. f
Symbol
CKSR6
2.
3.
2. TMC506: Bit 6 of 8-bit timer mode control register 50 (TMC50)
If the peripheral hardware clock (f
operating frequency varies depending on the supply voltage.
• V
• V
Note the following points when selecting the TM50 output as the base clock.
• Mode in which the count clock is cleared and started upon a match of TM50 and CR50 (TMC506 = 0)
• PWM mode (TMC506 = 1)
It is not necessary to enable (TOE50 = 1) TO50 output in any mode.
78K0/KB2-L and 78K0/KC2-L only
TPS63
Start the operation of 8-bit timer/event counter 50 first and then enable the timer F/F inversion operation
(TMC501 = 1).
Start the operation of 8-bit timer/event counter 50 first and then set the count clock to make the duty =
50%.
TMC501: Bit 1 of TMC50
PRS
7
DD
DD
0
0
0
0
0
0
0
0
0
1
1
1
1
= 2.7 to 5.5 V: f
= 1.8 to 2.7 V: f
: Peripheral hardware clock frequency
TPS62
Figure 14-8. Format of Clock Selection Register 6 (CKSR6)
Other than above
6
0
0
0
0
0
1
1
1
1
0
0
0
0
PRS
PRS
≤ 10 MHz
≤ 5 MHz
TPS61
5
0
0
0
1
1
0
0
1
1
0
0
1
1
PRS
) operates on the high-speed system clock (f
TPS60
4
0
0
1
0
1
0
1
0
1
0
1
0
1
f
f
f
f
f
f
f
f
f
f
f
TM50 output
Setting prohibited
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
TPS63
/2
/2
/2
/2
/2
/2
/2
/2
/2
/2
CHAPTER 14 SERIAL INTERFACE UART6
2
3
4
5
6
7
8
9
10
3
2 MHz
1 MHz
500 kHz
250 kHz
125 kHz
62.5 kHz
31.25 kHz
15.625 kHz
7.813 kHz
3.906 kHz
1.953 kHz
f
PRS
Base clock (f
Notes 2, 3
= 2 MHz
TPS62
2
9.77 kHz
4.88 kHz
XCLK6
5 MHz
2.5 MHz
1.25 MHz
625 kHz
312.5 kHz
156.25 kHz
78.13 kHz
39.06 kHz
19.53 kHz
f
PRS
) selection
= 5 MHz
TPS61
1
XH
) (XSEL = 1), the f
Note 1
10 MHz
5 MHz
2.5 MHz
1.25 MHz
625 kHz
312.5 kHz
156.25 kHz
78.13 kHz
39.06 kHz
19.53 kHz
9.77 kHz
f
PRS
= 10 MHz
TPS60
0
459
PRS