UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 417

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UPD78F0555MA-FAA-AX

Manufacturer Part Number
UPD78F0555MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0555MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
<R>
<R>
78K0/Kx2-L
12.2 Configuration of A/D Converter
(1) ANI0 to ANI10 pins
(2) AMP0OUT pin (products with operational amplifier only)
(3) AMP1OUT pin (products with operational amplifier of 78K0/KB2-L and 78K0/KC2-L only)
(4) PGAOUT signal (products with operational amplifier only)
(5) Sample & hold circuit
(6) Comparison voltage generator
(7) A/D voltage comparator
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
The A/D converter includes the following hardware.
These are the analog input pins of the 11-channel A/D converter. They input analog signals to be converted into
digital signals. Pins other than the one selected as the analog input pin can be used as I/O port pins.
Remark A/D converter analog input pins differ depending on products.
AMP0OUT is the output pin of operational amplifier 0.
This functions alternately as ANI1. The A/D converter can perform A/D conversion by selecting the output signal of
operational amplifier 0 as the analog input source.
AMP1OUT is the output pin of operational amplifier 1.
This functions alternately as ANI9. The A/D converter can perform A/D conversion by selecting the output signal of
operational amplifier 1 as the analog input source.
PGAOUT is the output signal of PGA.
The A/D converter can perform A/D conversion by selecting the output signal of PGA as the analog input source.
The sample & hold circuit samples each of the analog input voltages sequentially sent from the input circuit, and
sends them to the A/D voltage comparator. This circuit also holds the sampled analog input voltage during A/D
conversion.
The comparison voltage generator is connected between AV
with an analog input. The operation of the comparison voltage generator is enabled or disabled by using the ADCS
bit (bit 7 of the ADM0 register). The power consumption can be reduced by stopping the operation of the comparison
voltage generator when A/D conversion is not performed.
The A/D voltage comparator compares the sampled voltage values with the output voltage of the comparison voltage
generator. The operation of the A/D voltage comparator is enabled or disabled by using the ADCE bit (bit 0 of the
ADM0 register). The power consumption can be reduced by stopping the operation of the A/D voltage comparator
when A/D conversion is not performed.
• 78K0/KY2-L:
• 78K0/KA2-L (20-pin products):
• 78K0/KA2-L (25-pin products):
• 78K0/KA2-L (32-pin products):
• 78K0/KB2-L:
• 78K0/KC2-L (40-pin product):
• 78K0/KC2-L (44-pin and 48-pin products):
ANI0 to ANI3
ANI0 to ANI5
ANI0 to ANI6
ANI0 to ANI10
ANI0 to ANI3, ANI8 to ANI10
ANI0 to ANI6, ANI8 to ANI10
ANI0 to ANI10
REF
and AV
SS
, and generates a voltage to be compared
CHAPTER 12 A/D CONVERTER
403

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