UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 664

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UPD78F0555MA-FAA-AX

Manufacturer Part Number
UPD78F0555MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0555MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
(2) STOP mode release
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
High-speed system
clock (X1 oscillation)
is selected as CPU
clock when STOP
instruction is executed
High-speed system
clock (external clock
input) is selected as
CPU clock when STOP
instruction is executed
Internal high-speed
oscillation clock is
selected as CPU clock
when STOP instruction
is executed
Notes 1. The wait time for oscillation accuracy stabilization is as follows:
The STOP mode can be released by the following two sources.
(a) Release by unmasked interrupt request
High-speed system
clock (X1 oscillation)
High-speed system
clock (external clock
input)
Internal high-speed
oscillation clock
When an unmasked interrupt request is generated, the STOP mode is released. After the oscillation stabilization
time has elapsed, if interrupt acknowledgment is enabled, vectored interrupt servicing is carried out. If interrupt
acknowledgment is disabled, the next address instruction is executed.
2. The wait time is as follows:
Figure 19-5. Operation Timing When STOP Mode Is Released (When Unmasked Interrupt Request Is
• RMC register = 00H:
• RMC register = 56H:
• When vectored interrupt servicing is carried out:
• When vectored interrupt servicing is not carried out:
STOP mode
STOP mode release
Generated)
Wait for oscillation
accuracy stabilization
(oscillation stabilization time set by OSTS)
Wait
HALT status
Internal high-speed
Note 2
oscillation clock
Wait
Note 1
Note 2
Clock switched by software
Clock switched by software
102 to 407
120 to 481
17 or 18 clocks
11 or 12 clocks
CHAPTER 19 STANDBY FUNCTION
High-speed system clock
High-speed system clock
High-speed system clock
μ
μ
s
s
650

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