UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 543

• Manufacturer Part Number: UPD78F0555MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0555MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Note The wait time is calculated as follows.
Remark IICWL: IICA low-level width setting register
(IICWL setting value + IICWH setting value + 4) + t
IICWH: IICA high-level width setting register
t
f
F
PRS
:
D
:
SDAA0 and SCLA0 signal falling times (refer to CHAPTER 28 ELECTRICAL SPECIFICATIONS)
Peripheral hardware clock frequency
MSTS0 = 1?
IICBSY = 0?
STCF = 0?
STT0 = 1
STT0 = 1
Wait
Wait
C
C
A
B
Note
Figure 15-30. Master Operation in Multi-Master System (2/3)
Yes
Yes
Yes
Enables reserving communication.
Disables reserving communication.
Wait state after stop condition
was detected and start condition
was generated by the communication
reservation function.
No
No
No
Prepares for starting communication
(generates a start condition).
Secure wait time
Prepares for starting communication
(generates a start condition).
Note
by software.
F
× 2 × f
No
EXC0 = 1 or COI0 =1?
EXC0 = 1 or COI0 =1?
PRS
interrupt occurs?
interrupt occurs?
Slave operation
Slave operation
(clocks)
INTIICA0
INTIICA0
CHAPTER 15 SERIAL INTERFACE IICA
Yes
Yes
Yes
Yes
No
No
No
Waits for bus release
(communication being reserved).
Waits for bus release
Detects a stop condition.
D
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