UPD78F0555MA-FAA-AX Renesas Electronics America, UPD78F0555MA-FAA-AX Datasheet - Page 580

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UPD78F0555MA-FAA-AX

Manufacturer Part Number
UPD78F0555MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0555MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
(2) Serial I/O shift register 1n (SIO1n)
16.3 Registers Controlling Serial Interfaces CSI10 and CSI11
(1) Serial operation mode register 1n (CSIM1n)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Serial interfaces CSI10 and CSI11 are controlled by the following five registers.
• Serial operation mode register 1n (CSIM1n)
• Serial clock selection register 1n (CSIC1n)
• Port alternate switch control register (MUXSEL)
• Port mode register x (PMx)
• Port register x (Px)
This is an 8-bit register that converts data from parallel data into serial data and vice versa.
This register can be read by an 8-bit memory manipulation instruction.
Reception is started by reading data from SIO1n if bit 6 (TRMD1n) of serial operation mode register 1n (CSIM1n) is 0.
During reception, the data is read from the serial input pin (SI1n) to SIO1n.
Reset signal generation clears this register to 00H.
Cautions 1. Do not access SIO1n when CSOT1n = 1 (during serial communication).
Remarks 1. 78K0/KA2-L (25, 32-pin products): n = 1
Remark 78K0/KA2-L (25, 32-pin products): n = 1, x = 0, 3
CSIM1n is used to select the operation mode and enable or disable operation.
CSIM1n can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Remark 78K0/KA2-L (25, 32-pin products): n = 1
2. The SSI11 pin is available only in 78K0/KA2-L (25, 32-pin products) and 78K0/KC2-L (48-pin products).
78K0/KB2-L:
78K0/KC2-L:
78K0/KB2-L:
78K0/KC2-L:
2. In the slave mode, reception is started when data is read from SIO11 with a low level input to the
78K0/KB2-L:
78K0/KC2-L:
SSI11 pin. For details on the reception operation, refer to 16.4.2 (2) Communication operation.
n = 0, x = 1
n = 0, 1, x = 1, 4, 6, 12
n = 0
n = 0, 1
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
n = 0
n = 0, 1
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