AT91M63200-25AI Atmel, AT91M63200-25AI Datasheet - Page 113

• Manufacturer Part Number: AT91M63200-25AI
• Description: IC ARM7 MCU 176 TQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91M63200-25AI

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-TQFP, 176-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Timer/Counter Description
Each Timer/CTimer/Counterounter channel is identical in
operation. The registers for channel programming are listed
in Table 15.
Counter
Each Timer/Counter channel is organized around a 16-bit
counter. The value of the counter is incremented at each
positive edge of the input clock. When the counter reaches
the value 0xFFFF and passes to 0x0000, an overflow
occurs and the bit COVFS in TC_SR (Status Register) is
set.
The current value of the counter is accessible in real time
by reading TC_CV. The counter can be reset by a trigger.
In this case, the counter value passes to 0x0000 on the
next valid edge of the clock.
Clock Selection
At block level, input clock signals of each channel can
either be connected to the external inputs TCLK0, TCLK1
or TCLK2, or be connected to the configurable I/O signals
TIOA0, TIOA1 or TIOA2 for chaining by programming the
TC_BMR (block mode).
Each channel can independently select an internal or exter-
nal clock source for its counter:
•
•
The selected clock can be inverted with the CLKI bit in
TC_CMR (Channel Mode). This allows counting on the
opposite edges of the clock.
Internal clock signals: MCKI/2, MCKI/8, MCKI/32,
MCKI/128, MCKI/1024
External clock signals: XC0, XC1 or XC2
The burst function allows the clock to be validated when an
external signal is high. The BURST parameter in the Mode
Register defines this signal (none, XC0, XC1, XC2).
Note: In all cases, if an external clock is used, the duration
of each of its levels must be longer than the system clock
(MCKI) period. The external clock frequency must be at
least 2.5 times lower than the system clock.
Figure 54. Clock Selection
MCKI/2
MCKI/8
MCKI/32
MCKI/128
MCKI/1024
XC0
XC1
XC2
1
CLKS
BURST
AT91M63200
CLKI
Selected
Clock
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